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| author | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2012-09-28 15:09:59 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-09-28 21:09:50 +0100 |
| commit | 8ee777fd915b0e36f35a430225729007a1df6441 (patch) | |
| tree | 193b0628198a417168460517cc92ffcf158504c4 /arch/arm/mm/proc-xscale.S | |
| parent | e3ef0dc60392c0d23ea74d4a7df851089e00fd87 (diff) | |
| download | op-kernel-dev-8ee777fd915b0e36f35a430225729007a1df6441.zip op-kernel-dev-8ee777fd915b0e36f35a430225729007a1df6441.tar.gz | |
ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon
Some architectures like xscale and feroceon have cache API variants that
map cache flushing functions as aliases to the base architecture.
This patch adds the required aliases to complete the implementation of
cache flushing LoUIS API.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-xscale.S')
| -rw-r--r-- | arch/arm/mm/proc-xscale.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index b5ea31d..2551036 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -442,6 +442,7 @@ ENDPROC(xscale_dma_unmap_area) a0_alias flush_icache_all a0_alias flush_user_cache_all a0_alias flush_kern_cache_all + a0_alias flush_kern_cache_louis a0_alias flush_user_cache_range a0_alias coherent_kern_range a0_alias coherent_user_range |
