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author | Kirill A. Shutemov <kirill@shutemov.name> | 2009-09-25 13:39:47 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-02 22:34:32 +0100 |
commit | 4fb2847437d871fe579f820ceb18031db3359901 (patch) | |
tree | e2015dbc54178dd114eb0c41fa5a29d89dd15b41 /arch/arm/mm/proc-sa1100.S | |
parent | 6806bfe18fca92e2001538b84cab5f63c5ea4bed (diff) | |
download | op-kernel-dev-4fb2847437d871fe579f820ceb18031db3359901.zip op-kernel-dev-4fb2847437d871fe579f820ceb18031db3359901.tar.gz |
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.
Now we have three prefetch abort model:
* legacy - for CPUs before ARMv6. They doesn't provide neither
IFSR nor IFAR. We simulate IFSR with section translation fault
status for them to generalize code;
* ARMv6 - provides IFSR, but not IFAR;
* ARMv7 - provides both IFSR and IFAR.
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-sa1100.S')
-rw-r--r-- | arch/arm/mm/proc-sa1100.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 451e2d9..ee77002 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S @@ -214,7 +214,7 @@ sa1100_crval: .type sa1100_processor_functions, #object ENTRY(sa1100_processor_functions) .word v4_early_abort - .word pabort_noifar + .word legacy_pabort .word cpu_sa1100_proc_init .word cpu_sa1100_proc_fin .word cpu_sa1100_reset |