diff options
author | Nicolas Pitre <nico@cam.org> | 2008-09-16 13:05:53 -0400 |
---|---|---|
committer | Nicolas Pitre <nico@cam.org> | 2009-03-15 21:01:20 -0400 |
commit | 5f0fbf9ecaf354fa4bbf266fffdea2ea3d14a0ed (patch) | |
tree | 9f0c59760b2bec510519118ddb17d4b15db473f5 /arch/arm/mm/flush.c | |
parent | 1522ac3ec95ff0230e7aa516f86b674fdf72866c (diff) | |
download | op-kernel-dev-5f0fbf9ecaf354fa4bbf266fffdea2ea3d14a0ed.zip op-kernel-dev-5f0fbf9ecaf354fa4bbf266fffdea2ea3d14a0ed.tar.gz |
[ARM] fixmap support
This is the minimum fixmap interface expected to be implemented by
architectures supporting highmem.
We have a second level page table already allocated and covering
0xfff00000-0xffffffff because the exception vector page is located
at 0xffff0000, and various cache tricks already use some entries above
0xffff0000. Therefore the PTEs covering 0xfff00000-0xfffeffff are free
to be used.
However the XScale cache flushing code already uses virtual addresses
between 0xfffe0000 and 0xfffeffff.
So this reserves the 0xfff00000-0xfffdffff range for fixmap stuff.
The Documentation/arm/memory.txt information is updated accordingly,
including the information about the actual top of DMA memory mapping
region which didn't match the code.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mm/flush.c')
0 files changed, 0 insertions, 0 deletions