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author | Ingo Molnar <mingo@elte.hu> | 2009-10-29 09:02:15 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-10-29 09:02:20 +0100 |
commit | 9de09ace8d518141a4375e1d216ab64db4377799 (patch) | |
tree | da8e7a77f4ea91eb3bb73fc6da72ecf8c99e1c16 /arch/arm/mm/cache-v7.S | |
parent | 1beee96bae0daf7f491356777c3080cc436950f5 (diff) | |
parent | 6d3f1e12f46a2f9a1bb7e7aa433df8dd31ce5647 (diff) | |
download | op-kernel-dev-9de09ace8d518141a4375e1d216ab64db4377799.zip op-kernel-dev-9de09ace8d518141a4375e1d216ab64db4377799.tar.gz |
Merge branch 'tracing/urgent' into tracing/core
Merge reason: Pick up fixes and move base from -rc1 to -rc5.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
-rw-r--r-- | arch/arm/mm/cache-v7.S | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index bda0ec3..e1bd975 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -13,6 +13,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> +#include <asm/unwind.h> #include "proc-macros.S" @@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range) * - the Icache does not read data from the write buffer */ ENTRY(v7_coherent_user_range) + UNWIND(.fnstart ) dcache_line_size r2, r3 sub r3, r2, #1 bic r0, r0, r3 -1: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification +1: + USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification dsb - mcr p15, 0, r0, c7, c5, 1 @ invalidate I line + USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line add r0, r0, r2 +2: cmp r0, r1 blo 1b mov r0, #0 @@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range) dsb isb mov pc, lr + +/* + * Fault handling for the cache operation above. If the virtual address in r0 + * isn't mapped, just try the next page. + */ +9001: + mov r0, r0, lsr #12 + mov r0, r0, lsl #12 + add r0, r0, #4096 + b 2b + UNWIND(.fnend ) ENDPROC(v7_coherent_kern_range) ENDPROC(v7_coherent_user_range) |