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| author | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 16:30:58 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 16:30:58 -0700 |
| commit | 0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (patch) | |
| tree | fcf504879883763557e696eff81427b1ab78f76b /arch/arm/mm/cache-l2x0.c | |
| parent | 058276303dbc4ed089c1f7dad0871810b1f5ddf1 (diff) | |
| parent | caa20d974c86af496b419eef70010e63b7fab7ac (diff) | |
| download | op-kernel-dev-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.zip op-kernel-dev-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.tar.gz | |
Merge branch 'ioat' into dmaengine
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 0733463..21ad68b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -93,6 +93,15 @@ static inline void l2x0_flush_line(unsigned long addr) } #endif +static void l2x0_cache_sync(void) +{ + unsigned long flags; + + spin_lock_irqsave(&l2x0_lock, flags); + cache_sync(); + spin_unlock_irqrestore(&l2x0_lock, flags); +} + static inline void l2x0_inv_all(void) { unsigned long flags; @@ -225,6 +234,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) outer_cache.inv_range = l2x0_inv_range; outer_cache.clean_range = l2x0_clean_range; outer_cache.flush_range = l2x0_flush_range; + outer_cache.sync = l2x0_cache_sync; printk(KERN_INFO "L2X0 cache controller enabled\n"); } |
