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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-05-13 13:32:54 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-05-13 13:32:54 +0100
commitdc2af52c0d6d00fd530e4a5e300834cdb1bb1c1c (patch)
tree4573b99fb11e5b93bd011045039b370ddafe45e6 /arch/arm/mm/abort-ev6.S
parentf1992dde7fef6713a469a5a142b86812b8a47f9e (diff)
parent36be50515fe2aef61533b516fa2576a2c7fe7664 (diff)
downloadop-kernel-dev-dc2af52c0d6d00fd530e4a5e300834cdb1bb1c1c.zip
op-kernel-dev-dc2af52c0d6d00fd530e4a5e300834cdb1bb1c1c.tar.gz
Merge tag 'v3.4-rc7' into for-3.5
Linux 3.4-rc7 Conflicts): drivers/base/regmap/regmap.c (overlap with bug fixes) sound/soc/blackfin/bf5xx-ssm2602.c (overlap with bug fixes)
Diffstat (limited to 'arch/arm/mm/abort-ev6.S')
-rw-r--r--arch/arm/mm/abort-ev6.S17
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index ff1f7cc..8074199 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
/*
- * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).
- * The test below covers all the write situations, including Java bytecodes
+ * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
*/
- bic r1, r1, #1 << 11 @ clear bit 11 of FSR
+#ifdef CONFIG_ARM_ERRATA_326103
+ ldr ip, =0x4107b36
+ mrc p15, 0, r3, c0, c0, 0 @ get processor id
+ teq ip, r3, lsr #4 @ r0 ARM1136?
+ bne do_DataAbort
tst r5, #PSR_J_BIT @ Java?
+ tsteq r5, #PSR_T_BIT @ Thumb?
bne do_DataAbort
- do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3
- ldreq r3, [r4] @ read aborted ARM instruction
+ bic r1, r1, #1 << 11 @ clear bit 11 of FSR
+ ldr r3, [r4] @ read aborted ARM instruction
#ifdef CONFIG_CPU_ENDIAN_BE8
- reveq r3, r3
+ rev r3, r3
#endif
do_ldrd_abort tmp=ip, insn=r3
tst r3, #1 << 20 @ L = 0 -> write
orreq r1, r1, #1 << 11 @ yes.
+#endif
b do_DataAbort
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