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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-08-05 10:27:13 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-08-05 10:27:13 +0100
commit7109561524dc57b95fd3f9b61547268b9b6db8ed (patch)
treedf08f565b2c616b7e68fe35cd428a8c5ba3bfcb1 /arch/arm/mm/Kconfig
parent6bf755db4d5e7ccea61fb17727a183b9bd8945b1 (diff)
parent3bb70de692f70861f5c5729cd2b870d0104a7cc9 (diff)
downloadop-kernel-dev-7109561524dc57b95fd3f9b61547268b9b6db8ed.zip
op-kernel-dev-7109561524dc57b95fd3f9b61547268b9b6db8ed.tar.gz
Merge branches 'fixes' and 'misc' into for-next
Conflicts: arch/arm/kernel/iwmmxt.S arch/arm/mm/cache-l2x0.c arch/arm/mm/mmu.c
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c348eae..df46620 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -907,8 +907,8 @@ config PL310_ERRATA_588369
They are architecturally defined to behave as the execution of a
clean operation followed immediately by an invalidate operation,
both performing to the same memory location. This functionality
- is not correctly implemented in PL310 as clean lines are not
- invalidated as a result of these operations.
+ is not correctly implemented in PL310 prior to r2p0 (fixed in r2p0)
+ as clean lines are not invalidated as a result of these operations.
config PL310_ERRATA_727915
bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
@@ -918,7 +918,8 @@ config PL310_ERRATA_727915
PL310 can handle normal accesses while it is in progress. Under very
rare circumstances, due to this erratum, write data can be lost when
PL310 treats a cacheable write transaction during a Clean &
- Invalidate by Way operation.
+ Invalidate by Way operation. Revisions prior to r3p1 are affected by
+ this errata (fixed in r3p1).
config PL310_ERRATA_753970
bool "PL310 errata: cache sync operation may be faulty"
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