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author | Michal Simek <michal.simek@xilinx.com> | 2013-11-26 14:46:58 +0100 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2014-02-10 11:21:45 +0100 |
commit | 568800731a5b0f6b03d3ee9435b42fecd342454e (patch) | |
tree | d3b2aecb1f570ef1166ad3a5007c88327a54817e /arch/arm/mach-zynq | |
parent | 871c6971ec38d485fa601f6d9f60cb8d25a5aae1 (diff) | |
download | op-kernel-dev-568800731a5b0f6b03d3ee9435b42fecd342454e.zip op-kernel-dev-568800731a5b0f6b03d3ee9435b42fecd342454e.tar.gz |
ARM: zynq: Introduce zynq_slcr_unlock()
Call special function for unlocking SLCR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq')
-rw-r--r-- | arch/arm/mach-zynq/slcr.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index ab85f4e..a37d49a 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -71,6 +71,18 @@ static int zynq_slcr_read(u32 *val, u32 offset) } /** + * zynq_slcr_unlock - Unlock SLCR registers + * + * Return: a negative value on error, 0 on success + */ +static inline int zynq_slcr_unlock(void) +{ + zynq_slcr_write(SLCR_UNLOCK_MAGIC, SLCR_UNLOCK_OFFSET); + + return 0; +} + +/** * zynq_slcr_system_reset - Reset the entire system. */ void zynq_slcr_system_reset(void) @@ -82,7 +94,7 @@ void zynq_slcr_system_reset(void) * Note that this seems to require raw i/o * functions or there's a lockup? */ - writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET); + zynq_slcr_unlock(); /* * Clear 0x0F000000 bits of reboot status register to workaround @@ -166,7 +178,7 @@ int __init zynq_early_slcr_init(void) np->data = (__force void *)zynq_slcr_base; /* unlock the SLCR so that registers can be changed */ - writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET); + zynq_slcr_unlock(); pr_info("%s mapped to %p\n", np->name, zynq_slcr_base); |