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authorOlof Johansson <olof@lixom.net>2012-11-21 11:49:45 -0800
committerOlof Johansson <olof@lixom.net>2012-11-21 11:49:45 -0800
commit3f54db784a6af9a6d53396949cbecf62edbad247 (patch)
tree2be84e7be0c83a76432d9b2b00b0bd1ba0328839 /arch/arm/mach-zynq/common.c
parent46e8a79eb5449204f4b20d71c38c96b981b04e96 (diff)
parentacda38aab6a4e2a7ba56a07e27791384030acb4b (diff)
downloadop-kernel-dev-3f54db784a6af9a6d53396949cbecf62edbad247.zip
op-kernel-dev-3f54db784a6af9a6d53396949cbecf62edbad247.tar.gz
Merge branch 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze into next/multiplatform
From Michal Simek: This branch depends on arm-soc devel/debug_ll_init branch because we needed Rob's "ARM: implement debug_ll_io_init()" (sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86) patch. This branch also depends on zynq/dt branch because of previous major zynq changes. zynq/cleanup branch is subset of zynq/dt. * 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze: ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: zynq: add clk binding support to the ttc ARM: zynq: use zynq clk bindings clk: Add support for fundamental zynq clks ARM: zynq: dts: split up device tree ARM: zynq: Allow UART1 to be used as DEBUG_LL console. ARM: zynq: dts: add description of the second uart ARM: zynq: move arm-specific sys_timer out of ttc zynq: move static peripheral mappings zynq: remove use of CLKDEV_LOOKUP zynq: use pl310 device tree bindings zynq: use GIC device tree bindings Add/add conflict in arch/arm/Kconfig.debug. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-zynq/common.c')
-rw-r--r--arch/arm/mach-zynq/common.c80
1 files changed, 43 insertions, 37 deletions
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ab5cfdd..e16d4be 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -19,19 +19,21 @@
#include <linux/cpumask.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
+#include <linux/clk/zynq.h>
+#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/of.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include <asm/mach/time.h>
#include <asm/mach-types.h>
#include <asm/page.h>
+#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
-#include <mach/zynq_soc.h>
-#include <mach/clkdev.h>
#include "common.h"
static struct of_device_id zynq_of_bus_ids[] __initdata = {
@@ -45,55 +47,57 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = {
*/
static void __init xilinx_init_machine(void)
{
-#ifdef CONFIG_CACHE_L2X0
/*
* 64KB way size, 8-way associativity, parity disabled
*/
- l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF);
-#endif
+ l2x0_of_init(0x02060000, 0xF0F0FFFF);
of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
}
+static struct of_device_id irq_match[] __initdata = {
+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+ { }
+};
+
/**
* xilinx_irq_init() - Interrupt controller initialization for the GIC.
*/
static void __init xilinx_irq_init(void)
{
- gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE);
+ of_irq_init(irq_match);
}
-/* The minimum devices needed to be mapped before the VM system is up and
- * running include the GIC, UART and Timer Counter.
- */
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_SIZE SZ_8K
+#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
+
+static struct map_desc scu_desc __initdata = {
+ .virtual = SCU_PERIPH_VIRT,
+ .pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
+ .length = SCU_PERIPH_SIZE,
+ .type = MT_DEVICE,
+};
+
+static void __init xilinx_zynq_timer_init(void)
+{
+ struct device_node *np;
+ void __iomem *slcr;
+
+ np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
+ slcr = of_iomap(np, 0);
+ WARN_ON(!slcr);
+
+ xilinx_zynq_clocks_init(slcr);
-static struct map_desc io_desc[] __initdata = {
- {
- .virtual = TTC0_VIRT,
- .pfn = __phys_to_pfn(TTC0_PHYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
- .virtual = SCU_PERIPH_VIRT,
- .pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
- .length = SZ_8K,
- .type = MT_DEVICE,
- }, {
- .virtual = PL310_L2CC_VIRT,
- .pfn = __phys_to_pfn(PL310_L2CC_PHYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
- },
-
-#ifdef CONFIG_DEBUG_LL
- {
- .virtual = UART0_VIRT,
- .pfn = __phys_to_pfn(UART0_PHYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
- },
-#endif
+ xttcpss_timer_init();
+}
+/*
+ * Instantiate and initialize the system timer structure
+ */
+static struct sys_timer xttcpss_sys_timer = {
+ .init = xilinx_zynq_timer_init,
};
/**
@@ -101,11 +105,13 @@ static struct map_desc io_desc[] __initdata = {
*/
static void __init xilinx_map_io(void)
{
- iotable_init(io_desc, ARRAY_SIZE(io_desc));
+ debug_ll_io_init();
+ iotable_init(&scu_desc, 1);
}
static const char *xilinx_dt_match[] = {
- "xlnx,zynq-ep107",
+ "xlnx,zynq-zc702",
+ "xlnx,zynq-7000",
NULL
};
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