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authorLinus Walleij <linus.walleij@linaro.org>2011-04-27 12:55:37 +0200
committerLinus Walleij <linus.walleij@linaro.org>2011-06-21 10:57:41 +0200
commitf727a05a2c90cfe44749004718bc5a4ef3569b34 (patch)
tree7144db6b7d1f37d1a641fc0649d028d5b72d8434 /arch/arm/mach-ux500
parent9372da5073705fe991f0254baf47f82d491c83ff (diff)
downloadop-kernel-dev-f727a05a2c90cfe44749004718bc5a4ef3569b34.zip
op-kernel-dev-f727a05a2c90cfe44749004718bc5a4ef3569b34.tar.gz
mach-ux500: fix HREFv60 regression
This fixes a regression on the HREFv60 ux500 hardware: the wrong level shifter was addressed in the MMCI vdd handler, trying to reconfigure an unclaimed GPIO pin. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c32
1 files changed, 24 insertions, 8 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 7c6cb4fa..f8b1950 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -32,13 +32,32 @@
#define MCI_DATA31DIREN (1 << 5)
#define MCI_FBCLKEN (1 << 7)
+/* GPIO pins used by the sdi0 level shifter */
+static int sdi0_en = -1;
+static int sdi0_vsel = -1;
+
static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd,
unsigned char power_mode)
{
- if (power_mode == MMC_POWER_UP)
- gpio_set_value_cansleep(GPIO_SDMMC_EN, 1);
- else if (power_mode == MMC_POWER_OFF)
- gpio_set_value_cansleep(GPIO_SDMMC_EN, 0);
+ switch (power_mode) {
+ case MMC_POWER_UP:
+ case MMC_POWER_ON:
+ /*
+ * Level shifter voltage should depend on vdd to when deciding
+ * on either 1.8V or 2.9V. Once the decision has been made the
+ * level shifter must be disabled and re-enabled with a changed
+ * select signal in order to switch the voltage. Since there is
+ * no framework support yet for indicating 1.8V in vdd, use the
+ * default 2.9V.
+ */
+ gpio_direction_output(sdi0_vsel, 0);
+ gpio_direction_output(sdi0_en, 1);
+ break;
+ case MMC_POWER_OFF:
+ gpio_direction_output(sdi0_vsel, 0);
+ gpio_direction_output(sdi0_en, 0);
+ break;
+ }
return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN |
MCI_DATA2DIREN | MCI_DATA31DIREN;
@@ -77,10 +96,6 @@ static struct mmci_platform_data mop500_sdi0_data = {
#endif
};
-/* GPIO pins used by the sdi0 level shifter */
-static int sdi0_en = -1;
-static int sdi0_vsel = -1;
-
static void sdi0_configure(void)
{
int ret;
@@ -210,6 +225,7 @@ void __init mop500_sdi_init(void)
sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
sdi0_configure();
}
+
/*
* On boards with the TC35892 GPIO expander, sdi0 will finally
* be added when the TC35892 initializes and calls
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