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authorDanny Huang <dahuang@nvidia.com>2012-11-15 15:42:32 +0800
committerStephen Warren <swarren@nvidia.com>2012-11-15 14:16:46 -0700
commit1f851a262baf7cbd4096d4d279c73cb697021773 (patch)
tree02374f20236ff7a38b27c716d6bbafd104a9199c /arch/arm/mach-tegra
parentfd072a86bde1c5f7cf04618903c5ce8658011c1c (diff)
downloadop-kernel-dev-1f851a262baf7cbd4096d4d279c73cb697021773.zip
op-kernel-dev-1f851a262baf7cbd4096d4d279c73cb697021773.tar.gz
ARM: tegra: flexible spare fuse read function
Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/fuse.c19
-rw-r--r--arch/arm/mach-tegra/fuse.h2
2 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 6c752e8..bd19c2f 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -28,7 +28,8 @@
#define FUSE_UID_LOW 0x108
#define FUSE_UID_HIGH 0x10c
#define FUSE_SKU_INFO 0x110
-#define FUSE_SPARE_BIT 0x200
+
+#define TEGRA20_FUSE_SPARE_BIT 0x200
int tegra_sku_id;
int tegra_cpu_process_id;
@@ -36,6 +37,8 @@ int tegra_core_process_id;
int tegra_chip_id;
enum tegra_revision tegra_revision;
+static int tegra_fuse_spare_bit;
+
/* The BCT to use at boot is specified by board straps that can be read
* through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs.
*/
@@ -56,14 +59,14 @@ static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
[TEGRA_REVISION_A04] = "A04",
};
-static inline u32 tegra_fuse_readl(unsigned long offset)
+u32 tegra_fuse_readl(unsigned long offset)
{
return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
}
-static inline bool get_spare_fuse(int bit)
+bool tegra_spare_fuse(int bit)
{
- return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
+ return tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4);
}
static enum tegra_revision tegra_get_revision(u32 id)
@@ -77,7 +80,7 @@ static enum tegra_revision tegra_get_revision(u32 id)
return TEGRA_REVISION_A02;
case 3:
if (tegra_chip_id == TEGRA20 &&
- (get_spare_fuse(18) || get_spare_fuse(19)))
+ (tegra_spare_fuse(18) || tegra_spare_fuse(19)))
return TEGRA_REVISION_A03p;
else
return TEGRA_REVISION_A03;
@@ -99,10 +102,12 @@ void tegra_init_fuse(void)
reg = tegra_fuse_readl(FUSE_SKU_INFO);
tegra_sku_id = reg & 0xFF;
- reg = tegra_fuse_readl(FUSE_SPARE_BIT);
+ tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
+
+ reg = tegra_fuse_readl(tegra_fuse_spare_bit);
tegra_cpu_process_id = (reg >> 6) & 3;
- reg = tegra_fuse_readl(FUSE_SPARE_BIT);
+ reg = tegra_fuse_readl(tegra_fuse_spare_bit);
tegra_core_process_id = (reg >> 12) & 3;
reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index d2107b2..aef1223 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -48,5 +48,7 @@ extern int tegra_bct_strapping;
unsigned long long tegra_chip_uid(void);
void tegra_init_fuse(void);
+bool tegra_spare_fuse(int bit);
+u32 tegra_fuse_readl(unsigned long offset);
#endif
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