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| author | Joseph Lo <josephl@nvidia.com> | 2012-10-31 17:41:21 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-15 15:09:22 -0700 |
| commit | d552920a02759cdc45d8507868de10ac2f5b9a18 (patch) | |
| tree | 2c3c5f805e1657f64088631e63c145cc43739608 /arch/arm/mach-tegra/sleep.h | |
| parent | 01459c69dd48badeb7833c3293e43f7b8ae75e31 (diff) | |
| download | op-kernel-dev-d552920a02759cdc45d8507868de10ac2f5b9a18.zip op-kernel-dev-d552920a02759cdc45d8507868de10ac2f5b9a18.tar.gz | |
ARM: tegra30: cpuidle: add powered-down state for CPU0
This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.
Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".
Base on the work by:
Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep.h')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index bacf549..6e1b949 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -73,6 +73,7 @@ .endm #else void tegra_resume(void); +int tegra_sleep_cpu_finish(unsigned long); #ifdef CONFIG_HOTPLUG_CPU void tegra20_hotplug_init(void); @@ -83,6 +84,7 @@ static inline void tegra30_hotplug_init(void) {} #endif int tegra30_sleep_cpu_secondary_finish(unsigned long); +void tegra30_tear_down_cpu(void); #endif #endif |
