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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 01:17:21 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:50:10 +0100 |
| commit | f9040550bef6f05e68af029f11c371a318220a05 (patch) | |
| tree | 5564db6d102c515eacfa0527488a25f143a1cf4e /arch/arm/mach-tegra/pm.h | |
| parent | 4d6229f6e5ac9364637cb1a162284c35e4369f80 (diff) | |
| download | op-kernel-dev-f9040550bef6f05e68af029f11c371a318220a05.zip op-kernel-dev-f9040550bef6f05e68af029f11c371a318220a05.tar.gz | |
ARM: l2c: tegra: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
0 files changed, 0 insertions, 0 deletions
