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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:24:33 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:24:33 +0000 |
| commit | 2e0e943436912ffe0848ece58167edfe754edb96 (patch) | |
| tree | b91919095c74742fa06e2105db6d859bee39b2b4 /arch/arm/mach-tegra/include/mach/entry-macro.S | |
| parent | a32737e1ca650504f172292dd344eb64c02311f3 (diff) | |
| parent | ef3a0bf5bfadbace156fa2a3b9c753df2de41df2 (diff) | |
| download | op-kernel-dev-2e0e943436912ffe0848ece58167edfe754edb96.zip op-kernel-dev-2e0e943436912ffe0848ece58167edfe754edb96.tar.gz | |
Merge branch 'devel-stable' into for-linus
Conflicts:
arch/arm/kernel/setup.c
arch/arm/mach-shmobile/board-kota2.c
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/entry-macro.S | 22 |
1 files changed, 2 insertions, 20 deletions
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index dd165c5..ac11262 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -12,30 +12,15 @@ * GNU General Public License for more details. * */ -#include <mach/iomap.h> -#include <mach/io.h> - -#if defined(CONFIG_ARM_GIC) -#define HAVE_GET_IRQNR_PREAMBLE -#include <asm/hardware/entry-macro-gic.S> - - /* Uses the GIC interrupt controller built into the cpu */ -#define ICTRL_BASE (IO_CPU_VIRT + 0x100) .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - movw \base, #(ICTRL_BASE & 0x0000ffff) - movt \base, #((ICTRL_BASE & 0xffff0000) >> 16) + .macro arch_ret_to_user, tmp1, tmp2 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm -#else +#if !defined(CONFIG_ARM_GIC) /* legacy interrupt controller for AP16 */ - .macro disable_fiq - .endm .macro get_irqnr_preamble, base, tmp @ enable imprecise aborts @@ -46,9 +31,6 @@ orr \base, #0x0000f000 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS cmp \irqnr, #0x80 |
