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| author | Joseph Lo <josephl@nvidia.com> | 2013-10-11 17:58:38 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-10-18 16:28:10 -0600 |
| commit | f0c4ac1329452e5d31a03b4bb711c330065c0369 (patch) | |
| tree | 38f618cae4e1cf374681d6569aeb486dec44aa69 /arch/arm/mach-tegra/flowctrl.c | |
| parent | 92e94fe1cdaf3c6c636dc2c5129f8eabc89dca6c (diff) | |
| download | op-kernel-dev-f0c4ac1329452e5d31a03b4bb711c330065c0369.zip op-kernel-dev-f0c4ac1329452e5d31a03b4bb711c330065c0369.tar.gz | |
ARM: tegra: add LP1 support code for Tegra124
The LP1 suspend procedure is the same with Tegra30 and Tegra114. Just
need to update the difference of the register address, then we can
continue to share the code.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/flowctrl.c')
| -rw-r--r-- | arch/arm/mach-tegra/flowctrl.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index 5348543..ce8ab8a 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c @@ -87,6 +87,7 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid) break; case TEGRA30: case TEGRA114: + case TEGRA124: /* clear wfe bitmap */ reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; /* clear wfi bitmap */ @@ -125,6 +126,7 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid) break; case TEGRA30: case TEGRA114: + case TEGRA124: /* clear wfe bitmap */ reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; /* clear wfi bitmap */ |
