diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 10:49:02 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 10:49:02 -0700 |
commit | 0bbf211975addc2963b63a41a2eac99928365996 (patch) | |
tree | 31e830db386e76a53db1b2248dc503be43126924 /arch/arm/mach-tegra/clock.h | |
parent | 51e8703bdf12e2481b205096c973a3ab6a8ca18b (diff) | |
parent | d5fdafd38ca0c28c4648909ce0afd0a5420309ca (diff) | |
download | op-kernel-dev-0bbf211975addc2963b63a41a2eac99928365996.zip op-kernel-dev-0bbf211975addc2963b63a41a2eac99928365996.tar.gz |
Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegra
* 'for-linus' of git://android.git.kernel.org/kernel/tegra: (61 commits)
ARM: tegra: trimslice: initialize PCI-e only when running on TrimSlice
ARM: tegra: add PCI Express power gating
ARM: tegra: PCIE minor code refactoring
ARM: Tegra: DMA: Fail safe if initialization fails
ARM: Tegra: Rename clk_dev1/2 to cdev1/2
ARM: Tegra: Rename I2S clocks to match driver name
ARM: Tegra: Make tegra_dma_init a postcore_initcall
ARM: tegra: add seaboard, wario and kaen boards
ARM: tegra: harmony: fix pinmux for MMC slot
ARM: tegra: harmony: register sdhci devices
ARM: tegra: remove stale nvidia atag handler
ARM: tegra: common device resources
ARM: tegra: harmony: move over to tegra_gpio_config
ARM: tegra: add tegra_gpio_table and tegra_gpio_config
ARM: tegra: Hide EMC scaling config behind ARCH_TEGRA
ARM: tegra: Fix typo in TEGRA_IRQ_TO_GPIO
ARM: tegra: common: Enable core clocks
ARM: tegra: timer: Enable timer and rtc clocks
ARM: tegra: Move tegra_common_init to tegra_init_early
ARM: tegra: clock: prevent accidental disables of cpu clock
...
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r-- | arch/arm/mach-tegra/clock.h | 129 |
1 files changed, 58 insertions, 71 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 083a4cf..688316a 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -20,8 +20,9 @@ #ifndef __MACH_TEGRA_CLOCK_H #define __MACH_TEGRA_CLOCK_H -#include <linux/list.h> #include <linux/clkdev.h> +#include <linux/list.h> +#include <linux/spinlock.h> #define DIV_BUS (1 << 0) #define DIV_U71 (1 << 1) @@ -41,36 +42,13 @@ #define ENABLE_ON_INIT (1 << 28) struct clk; -struct regulator; - -struct dvfs_table { - unsigned long rate; - int millivolts; -}; - -struct dvfs_process_id_table { - int process_id; - struct dvfs_table *table; -}; - - -struct dvfs { - struct regulator *reg; - struct dvfs_table *table; - int max_millivolts; - - int process_id_table_length; - const char *reg_id; - bool cpu; - struct dvfs_process_id_table process_id_table[]; -}; struct clk_mux_sel { struct clk *input; u32 value; }; -struct clk_pll_table { +struct clk_pll_freq_table { unsigned long input_rate; unsigned long output_rate; u16 n; @@ -86,6 +64,7 @@ struct clk_ops { int (*set_parent)(struct clk *, struct clk *); int (*set_rate)(struct clk *, unsigned long); long (*round_rate)(struct clk *, unsigned long); + void (*reset)(struct clk *, bool); }; enum clk_state { @@ -96,55 +75,64 @@ enum clk_state { struct clk { /* node for master clocks list */ - struct list_head node; - struct list_head children; /* list of children */ - struct list_head sibling; /* node for children */ -#ifdef CONFIG_DEBUG_FS - struct dentry *dent; - struct dentry *parent_dent; -#endif - struct clk_ops *ops; - struct clk *parent; - struct clk_lookup lookup; - unsigned long rate; - unsigned long max_rate; - u32 flags; - u32 refcnt; - const char *name; - u32 reg; - u32 reg_shift; - unsigned int clk_num; - enum clk_state state; + struct list_head node; /* node for list of all clocks */ + struct clk_lookup lookup; + #ifdef CONFIG_DEBUG_FS - bool set; + struct dentry *dent; #endif + bool set; + struct clk_ops *ops; + unsigned long rate; + unsigned long max_rate; + unsigned long min_rate; + u32 flags; + const char *name; + + u32 refcnt; + enum clk_state state; + struct clk *parent; + u32 div; + u32 mul; - /* PLL */ - unsigned long input_min; - unsigned long input_max; - unsigned long cf_min; - unsigned long cf_max; - unsigned long vco_min; - unsigned long vco_max; - const struct clk_pll_table *pll_table; - - /* DIV */ - u32 div; - u32 mul; - - /* MUX */ const struct clk_mux_sel *inputs; - u32 sel; - u32 reg_mask; - - /* Virtual cpu clock */ - struct clk *main; - struct clk *backup; + u32 reg; + u32 reg_shift; - struct dvfs *dvfs; + struct list_head shared_bus_list; + + union { + struct { + unsigned int clk_num; + } periph; + struct { + unsigned long input_min; + unsigned long input_max; + unsigned long cf_min; + unsigned long cf_max; + unsigned long vco_min; + unsigned long vco_max; + const struct clk_pll_freq_table *freq_table; + int lock_delay; + } pll; + struct { + u32 sel; + u32 reg_mask; + } mux; + struct { + struct clk *main; + struct clk *backup; + } cpu; + struct { + struct list_head node; + bool enabled; + unsigned long rate; + } shared_bus_user; + } u; + + spinlock_t spinlock; }; - struct clk_duplicate { const char *name; struct clk_lookup lookup; @@ -163,11 +151,10 @@ void tegra2_periph_reset_assert(struct clk *c); void clk_init(struct clk *clk); struct clk *tegra_get_clock_by_name(const char *name); unsigned long clk_measure_input_freq(void); -void clk_disable_locked(struct clk *c); -int clk_enable_locked(struct clk *c); -int clk_set_parent_locked(struct clk *c, struct clk *parent); -int clk_set_rate_locked(struct clk *c, unsigned long rate); int clk_reparent(struct clk *c, struct clk *parent); void tegra_clk_init_from_table(struct tegra_clk_init_table *table); +unsigned long clk_get_rate_locked(struct clk *c); +int clk_set_rate_locked(struct clk *c, unsigned long rate); +void tegra2_sdmmc_tap_delay(struct clk *c, int delay); #endif |