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authorArnd Bergmann <arnd@arndb.de>2012-05-14 17:31:45 +0200
committerArnd Bergmann <arnd@arndb.de>2012-05-14 17:31:45 +0200
commit66a2886d867343eff6bf2646bea2c923d0cbf620 (patch)
treead44dcca4fa410ab2c16b4964f6c19571421b4df /arch/arm/mach-spear6xx
parentd2819f80d465672b09c2f4cb52303b7f951c4d0f (diff)
parentf613e220aebfafb653f7ce264950c15c99e27f2a (diff)
downloadop-kernel-dev-66a2886d867343eff6bf2646bea2c923d0cbf620.zip
op-kernel-dev-66a2886d867343eff6bf2646bea2c923d0cbf620.tar.gz
Merge branch 'spear/dt' into spear/clock
Conflicts: arch/arm/mach-spear3xx/clock.c arch/arm/mach-spear3xx/include/mach/generic.h arch/arm/mach-spear3xx/include/mach/misc_regs.h arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear6xx/clock.c arch/arm/mach-spear6xx/include/mach/misc_regs.h Resolve even more merge conflicts. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-spear6xx')
-rw-r--r--arch/arm/mach-spear6xx/include/mach/generic.h29
-rw-r--r--arch/arm/mach-spear6xx/include/mach/hardware.h24
-rw-r--r--arch/arm/mach-spear6xx/include/mach/irqs.h76
-rw-r--r--arch/arm/mach-spear6xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/spear.h56
-rw-r--r--arch/arm/mach-spear6xx/include/mach/spear600.h21
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c49
7 files changed, 37 insertions, 220 deletions
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 116b993..65514b15 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -15,34 +15,9 @@
#define __MACH_GENERIC_H
#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/amba/bus.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-/*
- * Each GPT has 2 timer channels
- * Following GPT channels will be used as clock source and clockevent
- */
-#define SPEAR_GPT0_BASE SPEAR6XX_CPU_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2
-
-/* Add spear6xx family device structure declarations here */
-extern struct amba_device gpio_device[];
-extern struct amba_device uart_device[];
-extern struct sys_timer spear6xx_timer;
-
-/* Add spear6xx family function declarations here */
-void __init spear_setup_timer(void);
-void __init spear6xx_map_io(void);
-void __init spear6xx_init_irq(void);
-void __init spear6xx_init(void);
-void __init spear600_init(void);
-void __init spear6xx_clk_init(void);
+void __init spear_setup_of_timer(void);
void spear_restart(char, const char *);
-
-/* Add spear600 machine device structure declarations here */
+void __init spear6xx_clk_init(void);
#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h
index 0b3f96a..40a8c17 100644
--- a/arch/arm/mach-spear6xx/include/mach/hardware.h
+++ b/arch/arm/mach-spear6xx/include/mach/hardware.h
@@ -1,23 +1 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/hardware.h
- *
- * Hardware definitions for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_HARDWARE_H
-#define __MACH_HARDWARE_H
-
-#include <plat/hardware.h>
-#include <mach/spear.h>
-
-/* Vitual to physical translation of statically mapped space */
-#define IO_ADDRESS(x) (x | 0xF0000000)
-
-#endif /* __MACH_HARDWARE_H */
+/* empty */
diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h
index 8f214b0..37a5c41 100644
--- a/arch/arm/mach-spear6xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear6xx/include/mach/irqs.h
@@ -16,82 +16,10 @@
/* IRQ definitions */
/* VIC 1 */
-#define IRQ_INTRCOMM_SW_IRQ 0
-#define IRQ_INTRCOMM_CPU_1 1
-#define IRQ_INTRCOMM_CPU_2 2
-#define IRQ_INTRCOMM_RAS2A11_1 3
-#define IRQ_INTRCOMM_RAS2A11_2 4
-#define IRQ_INTRCOMM_RAS2A12_1 5
-#define IRQ_INTRCOMM_RAS2A12_2 6
-#define IRQ_GEN_RAS_0 7
-#define IRQ_GEN_RAS_1 8
-#define IRQ_GEN_RAS_2 9
-#define IRQ_GEN_RAS_3 10
-#define IRQ_GEN_RAS_4 11
-#define IRQ_GEN_RAS_5 12
-#define IRQ_GEN_RAS_6 13
-#define IRQ_GEN_RAS_7 14
-#define IRQ_GEN_RAS_8 15
-#define IRQ_CPU_GPT1_1 16
-#define IRQ_CPU_GPT1_2 17
-#define IRQ_LOCAL_GPIO 18
-#define IRQ_PLL_UNLOCK 19
-#define IRQ_JPEG 20
-#define IRQ_FSMC 21
-#define IRQ_IRDA 22
-#define IRQ_RESERVED 23
-#define IRQ_UART_0 24
-#define IRQ_UART_1 25
-#define IRQ_SSP_1 26
-#define IRQ_SSP_2 27
-#define IRQ_I2C 28
-#define IRQ_GEN_RAS_9 29
-#define IRQ_GEN_RAS_10 30
-#define IRQ_GEN_RAS_11 31
-
-/* VIC 2 */
-#define IRQ_APPL_GPT1_1 32
-#define IRQ_APPL_GPT1_2 33
-#define IRQ_APPL_GPT2_1 34
-#define IRQ_APPL_GPT2_2 35
-#define IRQ_APPL_GPIO 36
-#define IRQ_APPL_SSP 37
-#define IRQ_APPL_ADC 38
-#define IRQ_APPL_RESERVED 39
-#define IRQ_AHB_EXP_MASTER 40
-#define IRQ_DDR_CONTROLLER 41
-#define IRQ_BASIC_DMA 42
-#define IRQ_BASIC_RESERVED1 43
-#define IRQ_BASIC_SMI 44
-#define IRQ_BASIC_CLCD 45
-#define IRQ_EXP_AHB_1 46
-#define IRQ_EXP_AHB_2 47
-#define IRQ_BASIC_GPT1_1 48
-#define IRQ_BASIC_GPT1_2 49
-#define IRQ_BASIC_RTC 50
-#define IRQ_BASIC_GPIO 51
-#define IRQ_BASIC_WDT 52
-#define IRQ_BASIC_RESERVED 53
-#define IRQ_AHB_EXP_SLAVE 54
-#define IRQ_GMAC_1 55
-#define IRQ_GMAC_2 56
-#define IRQ_USB_DEV 57
-#define IRQ_USB_H_OHCI_0 58
-#define IRQ_USB_H_EHCI_0 59
-#define IRQ_USB_H_OHCI_1 60
-#define IRQ_USB_H_EHCI_1 61
-#define IRQ_EXP_AHB_3 62
-#define IRQ_EXP_AHB_4 63
-
#define IRQ_VIC_END 64
/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE IRQ_VIC_END
-#define SPEAR_GPIO0_INT_BASE SPEAR_GPIO_INT_BASE
-#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO0_INT_BASE + 8)
-#define SPEAR_GPIO2_INT_BASE (SPEAR_GPIO1_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END (SPEAR_GPIO2_INT_BASE + 8)
-#define VIRTUAL_IRQS (SPEAR_GPIO_INT_END - IRQ_VIC_END)
-#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS)
+#define VIRTUAL_IRQS 24
+#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS)
#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index 633074f..179e457 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -14,9 +14,9 @@
#ifndef __MACH_MISC_REGS_H
#define __MACH_MISC_REGS_H
-#include <mach/hardware.h>
#include <mach/spear.h>
#define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE)
+#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
index 7fd6215..cb8ed2f 100644
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -15,69 +15,25 @@
#define __MACH_SPEAR6XX_H
#include <asm/memory.h>
-#include <mach/spear600.h>
-#define SPEAR6XX_ML_SDRAM_BASE UL(0x00000000)
/* ICM1 - Low speed connection */
#define SPEAR6XX_ICM1_BASE UL(0xD0000000)
-
+#define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000)
#define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000)
-#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
-
-#define SPEAR6XX_ICM1_UART1_BASE UL(0xD0080000)
-#define SPEAR6XX_ICM1_SSP0_BASE UL(0xD0100000)
-#define SPEAR6XX_ICM1_SSP1_BASE UL(0xD0180000)
-#define SPEAR6XX_ICM1_I2C_BASE UL(0xD0200000)
-#define SPEAR6XX_ICM1_JPEG_BASE UL(0xD0800000)
-#define SPEAR6XX_ICM1_IRDA_BASE UL(0xD1000000)
-#define SPEAR6XX_ICM1_FSMC_BASE UL(0xD1800000)
-#define SPEAR6XX_ICM1_NAND_BASE UL(0xD2000000)
-#define SPEAR6XX_ICM1_SRAM_BASE UL(0xD2800000)
-
-/* ICM2 - Application Subsystem */
-#define SPEAR6XX_ICM2_BASE UL(0xD8000000)
-#define SPEAR6XX_ICM2_TMR0_BASE UL(0xD8000000)
-#define SPEAR6XX_ICM2_TMR1_BASE UL(0xD8080000)
-#define SPEAR6XX_ICM2_GPIO_BASE UL(0xD8100000)
-#define SPEAR6XX_ICM2_SSP2_BASE UL(0xD8180000)
-#define SPEAR6XX_ICM2_ADC_BASE UL(0xD8200000)
+#define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE)
/* ML-1, 2 - Multi Layer CPU Subsystem */
#define SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
-#define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000)
-#define SPEAR6XX_CPU_GPIO_BASE UL(0xF0100000)
-#define SPEAR6XX_CPU_VIC_SEC_BASE UL(0xF1000000)
-#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
-#define SPEAR6XX_CPU_VIC_PRI_BASE UL(0xF1100000)
-#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
+#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
/* ICM3 - Basic Subsystem */
-#define SPEAR6XX_ICM3_BASE UL(0xF8000000)
-#define SPEAR6XX_ICM3_SMEM_BASE UL(0xF8000000)
#define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
-#define SPEAR6XX_ICM3_CLCD_BASE UL(0xFC200000)
+#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
#define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000)
-#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000)
-#define SPEAR6XX_ICM3_TMR_BASE UL(0xFC800000)
-#define SPEAR6XX_ICM3_WDT_BASE UL(0xFC880000)
-#define SPEAR6XX_ICM3_RTC_BASE UL(0xFC900000)
-#define SPEAR6XX_ICM3_GPIO_BASE UL(0xFC980000)
#define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
-#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
+#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE)
#define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
-#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
-
-/* ICM4 - High Speed Connection */
-#define SPEAR6XX_ICM4_BASE UL(0xE0000000)
-#define SPEAR6XX_ICM4_GMAC_BASE UL(0xE0800000)
-#define SPEAR6XX_ICM4_USBD_FIFO_BASE UL(0xE1000000)
-#define SPEAR6XX_ICM4_USBD_CSR_BASE UL(0xE1100000)
-#define SPEAR6XX_ICM4_USBD_PLDT_BASE UL(0xE1200000)
-#define SPEAR6XX_ICM4_USB_EHCI0_BASE UL(0xE1800000)
-#define SPEAR6XX_ICM4_USB_OHCI0_BASE UL(0xE1900000)
-#define SPEAR6XX_ICM4_USB_EHCI1_BASE UL(0xE2000000)
-#define SPEAR6XX_ICM4_USB_OHCI1_BASE UL(0xE2100000)
-#define SPEAR6XX_ICM4_USB_ARB_BASE UL(0xE2800000)
+#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE)
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
diff --git a/arch/arm/mach-spear6xx/include/mach/spear600.h b/arch/arm/mach-spear6xx/include/mach/spear600.h
deleted file mode 100644
index c068cc5..0000000
--- a/arch/arm/mach-spear6xx/include/mach/spear600.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-spear66xx/include/mach/spear600.h
- *
- * SPEAr600 Machine specific definition
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifdef CONFIG_MACH_SPEAR600
-
-#ifndef __MACH_SPEAR600_H
-#define __MACH_SPEAR600_H
-
-#endif /* __MACH_SPEAR600_H */
-
-#endif /* CONFIG_MACH_SPEAR600 */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index e9031ec6..2e2e359 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -14,6 +14,8 @@
*/
#include <linux/amba/pl08x.h>
+#include <linux/clk.h>
+#include <linux/err.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
@@ -21,9 +23,11 @@
#include <asm/hardware/pl080.h>
#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
#include <plat/pl080.h>
#include <mach/generic.h>
-#include <mach/hardware.h>
+#include <mach/spear.h>
/* dmac device registration */
static struct pl08x_channel_data spear600_dma_info[] = {
@@ -384,32 +388,29 @@ struct pl08x_platform_data pl080_plat_data = {
.num_slave_channels = ARRAY_SIZE(spear600_dma_info),
};
-/* Following will create static virtual/physical mappings */
-static struct map_desc spear6xx_io_desc[] __initdata = {
+/*
+ * Following will create 16MB static virtual/physical mappings
+ * PHYSICAL VIRTUAL
+ * 0xF0000000 0xF0000000
+ * 0xF1000000 0xF1000000
+ * 0xD0000000 0xFD000000
+ * 0xFC000000 0xFC000000
+ */
+struct map_desc spear6xx_io_desc[] __initdata = {
{
- .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
- .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
- .length = SZ_4K,
- .type = MT_DEVICE
- }, {
- .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
- .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
- .length = SZ_4K,
+ .virtual = VA_SPEAR6XX_ML_CPU_BASE,
+ .pfn = __phys_to_pfn(SPEAR6XX_ML_CPU_BASE),
+ .length = 2 * SZ_16M,
.type = MT_DEVICE
- }, {
- .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
- .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
- .length = SZ_4K,
- .type = MT_DEVICE
- }, {
- .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
- .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
- .length = SZ_4K,
+ }, {
+ .virtual = VA_SPEAR6XX_ICM1_BASE,
+ .pfn = __phys_to_pfn(SPEAR6XX_ICM1_BASE),
+ .length = SZ_16M,
.type = MT_DEVICE
}, {
- .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
- .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
- .length = SZ_4K,
+ .virtual = VA_SPEAR6XX_ICM3_SMI_CTRL_BASE,
+ .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE),
+ .length = SZ_16M,
.type = MT_DEVICE
},
};
@@ -446,7 +447,7 @@ static void __init spear6xx_timer_init(void)
clk_put(gpt_clk);
clk_put(pclk);
- spear_setup_timer();
+ spear_setup_of_timer();
}
struct sys_timer spear6xx_timer = {
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