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| author | Arnd Bergmann <arnd@arndb.de> | 2012-11-13 13:48:02 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-13 13:48:02 +0100 |
| commit | 97b129be91bc978a205db24241840b95cfa28325 (patch) | |
| tree | c9a431561f738d39a1a2c6dbed94af838f7d3b35 /arch/arm/mach-shmobile/smp-emev2.c | |
| parent | 9e0c6b1f47b7cd8e2ce542575573d7c235759ff9 (diff) | |
| parent | 94091c6b9498116abe3035137d8c3e707528efd0 (diff) | |
| download | op-kernel-dev-97b129be91bc978a205db24241840b95cfa28325.zip op-kernel-dev-97b129be91bc978a205db24241840b95cfa28325.tar.gz | |
Merge branch 'soc4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
Its a little embarrassing, but they all fix problems introduced
in previous pull-requests for 3.8 that have been merged.
* The three Revert patches back-out secondary CPU initialisation
changes from Bastian Hecht which he as advised me are incorrect
and break secondary CPU initialisation.
* The clkfwk patch from Morimoto-san resolves a build warning.
* 'soc4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
sh: clkfwk: fixup unsed variable warning
Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-shmobile/smp-emev2.c')
| -rw-r--r-- | arch/arm/mach-shmobile/smp-emev2.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 535426c..f674562 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -32,8 +32,24 @@ #define EMEV2_SCU_BASE 0x1e000000 +static DEFINE_SPINLOCK(scu_lock); static void __iomem *scu_base; +static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) +{ + unsigned long tmp; + + /* we assume this code is running on a different cpu + * than the one that is changing coherency setting */ + spin_lock(&scu_lock); + tmp = readl(scu_base + 8); + tmp &= ~clr; + tmp |= set; + writel(tmp, scu_base + 8); + spin_unlock(&scu_lock); + +} + static unsigned int __init emev2_get_core_count(void) { if (!scu_base) { @@ -79,7 +95,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * cpu = cpu_logical_map(cpu); /* enable cache coherency */ - scu_power_mode(scu_base, 0); + modify_scu_cpu_psr(0, 3 << (cpu * 8)); /* Tell ROM loader about our vector (in headsmp.S) */ emev2_set_boot_vector(__pa(shmobile_secondary_vector)); @@ -90,10 +106,12 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) { + int cpu = cpu_logical_map(0); + scu_enable(scu_base); /* enable cache coherency on CPU0 */ - scu_power_mode(scu_base, 0); + modify_scu_cpu_psr(0, 3 << (cpu * 8)); } static void __init emev2_smp_init_cpus(void) |
