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authorKevin Hilman <khilman@linaro.org>2013-10-10 15:33:39 -0700
committerKevin Hilman <khilman@linaro.org>2013-10-10 15:34:26 -0700
commit695e6044775daac00bac95901b597540fbf3108e (patch)
treefa71121d1602eb6ab13b646118bdfdaf6d9dbdba /arch/arm/mach-shmobile/setup-r8a7790.c
parenteea4fba5b3e33df88704691e02799305e3b91de1 (diff)
parent687c27b07050c21a62c4c975777c89e698649a6b (diff)
downloadop-kernel-dev-695e6044775daac00bac95901b597540fbf3108e.zip
op-kernel-dev-695e6044775daac00bac95901b597540fbf3108e.tar.gz
Merge tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman: Second Round of Renesas ARM based SoC updates for v3.13 * SMP support for r8a7791 SoC * r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs * Add HPB-DMAC to r8a7779 and r8a7778 SoCs * Add r7s72100 SoC * Make use of ARCH timer workaround on r8a7791 SoC * Add IRQC platform device support to r8a7791 SoC * Add I2C clocks and aliases for the DT mode for r8a7790 SoC * Add MAC platform device to r8a73a4 SoC * tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791 SMP support ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT ARM: shmobile: r7s72100 SCIF support ARM: shmobile: Initial r7s72100 SoC support ARM: shmobile: r8a7791 Arch timer workaround ARM: shmobile: r8a7791 IRQC platform device support ARM: shmobile: Introduce r8a7791_add_standard_devices() ARM: shmobile: Break out R-Car Gen2 setup code ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode ARM: shmobile: r8a7779: add HPB-DMAC support ARM: shmobile: r8a7778: add HPB-DMAC support ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c')
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7790.c68
1 files changed, 1 insertions, 67 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index c7e24ef..c47bcebb 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -18,7 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <linux/clocksource.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
@@ -203,71 +202,6 @@ void __init r8a7790_add_standard_devices(void)
r8a7790_register_thermal();
}
-#define MODEMR 0xe6160060
-
-u32 __init r8a7790_read_mode_pins(void)
-{
- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
- u32 mode;
-
- BUG_ON(!modemr);
- mode = ioread32(modemr);
- iounmap(modemr);
-
- return mode;
-}
-
-#define CNTCR 0
-#define CNTFID0 0x20
-
-void __init r8a7790_timer_init(void)
-{
-#ifdef CONFIG_ARM_ARCH_TIMER
- u32 mode = r8a7790_read_mode_pins();
- void __iomem *base;
- int extal_mhz = 0;
- u32 freq;
-
- /* At Linux boot time the r8a7790 arch timer comes up
- * with the counter disabled. Moreover, it may also report
- * a potentially incorrect fixed 13 MHz frequency. To be
- * correct these registers need to be updated to use the
- * frequency EXTAL / 2 which can be determined by the MD pins.
- */
-
- switch (mode & (MD(14) | MD(13))) {
- case 0:
- extal_mhz = 15;
- break;
- case MD(13):
- extal_mhz = 20;
- break;
- case MD(14):
- extal_mhz = 26;
- break;
- case MD(13) | MD(14):
- extal_mhz = 30;
- break;
- }
-
- /* The arch timer frequency equals EXTAL / 2 */
- freq = extal_mhz * (1000000 / 2);
-
- /* Remap "armgcnt address map" space */
- base = ioremap(0xe6080000, PAGE_SIZE);
-
- /* Update registers with correct frequency */
- iowrite32(freq, base + CNTFID0);
- asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
-
- /* make sure arch timer is started by setting bit 0 of CNTCR */
- iowrite32(1, base + CNTCR);
- iounmap(base);
-#endif /* CONFIG_ARM_ARCH_TIMER */
-
- clocksource_of_init();
-}
-
void __init r8a7790_init_early(void)
{
#ifndef CONFIG_ARM_ARCH_TIMER
@@ -285,7 +219,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = {
DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
.smp = smp_ops(r8a7790_smp_ops),
.init_early = r8a7790_init_early,
- .init_time = r8a7790_timer_init,
+ .init_time = rcar_gen2_timer_init,
.dt_compat = r8a7790_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */
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