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authorKevin Hilman <khilman@linaro.org>2013-10-10 15:33:39 -0700
committerKevin Hilman <khilman@linaro.org>2013-10-10 15:34:26 -0700
commit695e6044775daac00bac95901b597540fbf3108e (patch)
treefa71121d1602eb6ab13b646118bdfdaf6d9dbdba /arch/arm/mach-shmobile/clock-r8a73a4.c
parenteea4fba5b3e33df88704691e02799305e3b91de1 (diff)
parent687c27b07050c21a62c4c975777c89e698649a6b (diff)
downloadop-kernel-dev-695e6044775daac00bac95901b597540fbf3108e.zip
op-kernel-dev-695e6044775daac00bac95901b597540fbf3108e.tar.gz
Merge tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman: Second Round of Renesas ARM based SoC updates for v3.13 * SMP support for r8a7791 SoC * r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs * Add HPB-DMAC to r8a7779 and r8a7778 SoCs * Add r7s72100 SoC * Make use of ARCH timer workaround on r8a7791 SoC * Add IRQC platform device support to r8a7791 SoC * Add I2C clocks and aliases for the DT mode for r8a7790 SoC * Add MAC platform device to r8a73a4 SoC * tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791 SMP support ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT ARM: shmobile: r7s72100 SCIF support ARM: shmobile: Initial r7s72100 SoC support ARM: shmobile: r8a7791 Arch timer workaround ARM: shmobile: r8a7791 IRQC platform device support ARM: shmobile: Introduce r8a7791_add_standard_devices() ARM: shmobile: Break out R-Car Gen2 setup code ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode ARM: shmobile: r8a7779: add HPB-DMAC support ARM: shmobile: r8a7778: add HPB-DMAC support ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a73a4.c')
-rw-r--r--arch/arm/mach-shmobile/clock-r8a73a4.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 5bd2e85..571409b 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -504,7 +504,7 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */
enum {
- MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
+ MSTP218, MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
MSTP411, MSTP410, MSTP409,
@@ -519,6 +519,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
+ [MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC */
[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
@@ -578,6 +579,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
+ CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
+ CLKDEV_DEV_ID("e6700020.dma-controller", &mstp_clks[MSTP218]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
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