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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 14:10:26 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 14:10:26 -0700
commit40e71e7015ab85c8606f50736525220948a3b24b (patch)
tree76fadfaf9780dd1e5666954311a7976f674cbcd0 /arch/arm/mach-shmobile/board-bockw.c
parent3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232 (diff)
parentf8ace40e88eb7063f66697713373ac64cbc1412a (diff)
downloadop-kernel-dev-40e71e7015ab85c8606f50736525220948a3b24b.zip
op-kernel-dev-40e71e7015ab85c8606f50736525220948a3b24b.tar.gz
Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC board specific changes from Arnd Bergmann: "These are 18 branches on 9 platforms with board specific changes, mostly for defconfig files, but nothing really exciting in here. Since the shmobile platform still uses board files for some of the newer machines, we get a few changes there as the result of drivers getting enabled for those boards. This causes some conflicts with contents getting added from multiple branches in sh-mobile specific files. Renesas is putting a lot of work into migrating to device-tree based setup, which will make all those files obsolete in the future and avoid both the conflicts and the need to have these files in the first place." * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits) arm: multi_v7_defconfig: Enable initrd/initramfs support arm: multi_v7_defconfig: Enable Zynq UART driver ARM: omap2plus_defconfig: enable USB_PHY and NOP_USB_XCEIV ARM: OMAP1: nokia770: enable Tahvo ARM: OMAP3EVM: Marking omap3_evm_display_init() with CONFIG_BROKEN arm: omap: board-overo: reset GPIO for SMSC911x ARM: shmobile: BOCK-W: change Ether device name ARM: ux500: board-mop500: remove unused pin modes ARM: shmobile: bockw: add MMCIF support ARM: shmobile: bockw: add SPI FLASH support ARM: shmobile: bockw: add I2C device support ARM: shmobile: BOCK-W: add Ether support ARM: tegra: defconfig updates ARM: shmobile: bockw defconfig: add MMCIF support ARM: shmobile: bockw defconfig: add M25P80 support ARM: shmobile: bockw defconfig: add RTC RX8581 support ARM: shmobile: marzen: keep local function as static ARM: shmobile: bockw: add SDHI0 support ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC ARM: shmobile: lager: support GPIO switches ...
Diffstat (limited to 'arch/arm/mach-shmobile/board-bockw.c')
-rw-r--r--arch/arm/mach-shmobile/board-bockw.c159
1 files changed, 153 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 7ed2401..d555464 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -18,14 +18,52 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <linux/mfd/tmio.h>
+#include <linux/mmc/host.h>
+#include <linux/mtd/partitions.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7778.h>
#include <asm/mach/arch.h>
+/*
+ * CN9(Upper side) SCIF/RCAN selection
+ *
+ * 1,4 3,6
+ * SW40 SCIF RCAN
+ * SW41 SCIF RCAN
+ */
+
+/*
+ * MMC (CN26) pin
+ *
+ * SW6 (D2) 3 pin
+ * SW7 (D5) ON
+ * SW8 (D3) 3 pin
+ * SW10 (D4) 1 pin
+ * SW12 (CLK) 1 pin
+ * SW13 (D6) 3 pin
+ * SW14 (CMD) ON
+ * SW15 (D6) 1 pin
+ * SW16 (D0) ON
+ * SW17 (D1) ON
+ * SW18 (D7) 3 pin
+ * SW19 (MMC) 1 pin
+ */
+
+/* Dummy supplies, where voltage doesn't matter */
+static struct regulator_consumer_supply dummy_supplies[] = {
+ REGULATOR_SUPPLY("vddvario", "smsc911x"),
+ REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+};
+
static struct smsc911x_platform_config smsc911x_data = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
@@ -38,36 +76,128 @@ static struct resource smsc911x_resources[] = {
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
};
+/* USB */
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
+/* SDHI */
+static struct sh_mobile_sdhi_info sdhi0_info = {
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED,
+ .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+};
+
+static struct sh_eth_plat_data ether_platform_data __initdata = {
+ .phy = 0x01,
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .register_type = SH_ETH_REG_FAST_RCAR,
+ .phy_interface = PHY_INTERFACE_MODE_RMII,
+ /*
+ * Although the LINK signal is available on the board, it's connected to
+ * the link/activity LED output of the PHY, thus the link disappears and
+ * reappears after each packet. We'd be better off ignoring such signal
+ * and getting the link state from the PHY indirectly.
+ */
+ .no_ether_link = 1,
+};
+
+/* I2C */
+static struct i2c_board_info i2c0_devices[] = {
+ {
+ I2C_BOARD_INFO("rx8581", 0x51),
+ },
+};
+
+/* HSPI*/
+static struct mtd_partition m25p80_spi_flash_partitions[] = {
+ {
+ .name = "data(spi)",
+ .size = 0x0100000,
+ .offset = 0,
+ },
+};
+
+static struct flash_platform_data spi_flash_data = {
+ .name = "m25p80",
+ .type = "s25fl008k",
+ .parts = m25p80_spi_flash_partitions,
+ .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
+};
+
+static struct spi_board_info spi_board_info[] __initdata = {
+ {
+ .modalias = "m25p80",
+ .max_speed_hz = 104000000,
+ .chip_select = 0,
+ .bus_num = 0,
+ .mode = SPI_MODE_0,
+ .platform_data = &spi_flash_data,
+ },
+};
+
+/* MMC */
+static struct sh_mmcif_plat_data sh_mmcif_plat = {
+ .sup_pclk = 0,
+ .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .caps = MMC_CAP_4_BIT_DATA |
+ MMC_CAP_8_BIT_DATA |
+ MMC_CAP_NEEDS_POLL,
+};
+
static const struct pinctrl_map bockw_pinctrl_map[] = {
+ /* Ether */
+ PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
+ "ether_rmii", "ether"),
+ /* HSPI0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
+ "hspi0_a", "hspi0"),
+ /* MMC */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
+ "mmc_data8", "mmc"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
+ "mmc_ctrl", "mmc"),
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"),
+ /* USB */
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
"usb0", "usb0"),
PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
"usb1", "usb1"),
+ /* SDHI0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
+ "sdhi0", "sdhi0"),
};
+#define FPGA 0x18200000
#define IRQ0MR 0x30
+#define PFC 0xfffc0000
+#define PUPR4 0x110
static void __init bockw_init(void)
{
- void __iomem *fpga;
+ void __iomem *base;
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices();
r8a7778_add_usb_phy_device(&usb_phy_platform_data);
+ r8a7778_add_ether_device(&ether_platform_data);
+ r8a7778_add_i2c_device(0);
+ r8a7778_add_hspi_device(0);
+ r8a7778_add_mmc_device(&sh_mmcif_plat);
+ i2c_register_board_info(0, i2c0_devices,
+ ARRAY_SIZE(i2c0_devices));
+ spi_register_board_info(spi_board_info,
+ ARRAY_SIZE(spi_board_info));
pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
- fpga = ioremap_nocache(0x18200000, SZ_1M);
- if (fpga) {
+ /* for SMSC */
+ base = ioremap_nocache(FPGA, SZ_1M);
+ if (base) {
/*
* CAUTION
*
@@ -75,16 +205,33 @@ static void __init bockw_init(void)
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
- u16 val = ioread16(fpga + IRQ0MR);
+ u16 val = ioread16(base + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
- iowrite16(val, fpga + IRQ0MR);
- iounmap(fpga);
+ iowrite16(val, base + IRQ0MR);
+ iounmap(base);
+
+ regulator_register_fixed(0, dummy_supplies,
+ ARRAY_SIZE(dummy_supplies));
platform_device_register_resndata(
&platform_bus, "smsc911x", -1,
smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
&smsc911x_data, sizeof(smsc911x_data));
}
+
+ /* for SDHI */
+ base = ioremap_nocache(PFC, 0x200);
+ if (base) {
+ /*
+ * FIXME
+ *
+ * SDHI CD/WP pin needs pull-up
+ */
+ iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
+ iounmap(base);
+
+ r8a7778_sdhi_init(0, &sdhi0_info);
+ }
}
static const char *bockw_boards_compat_dt[] __initdata = {
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