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authorArnd Bergmann <arnd@arndb.de>2013-03-05 11:28:29 +0100
committerArnd Bergmann <arnd@arndb.de>2013-04-19 13:51:20 +0200
commit7ba8022fc3a1d2434c1f038f022c5d69026319ca (patch)
treefff3699a7037bb225381ca61fef0d11b20e80677 /arch/arm/mach-s5pv210
parentb4cf27f7735f9e5d80f3e79fcf355ced15461219 (diff)
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ARM: exynos: prepare for sparse IRQ
When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in the machine_desc for legacy IRQ domains, and any file referring to the number of interrupts or a specific number must include the mach/irqs.h header file explicitly. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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