diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2010-12-29 22:20:30 -0700 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2010-12-29 22:21:47 -0700 |
commit | d392da5207352f09030e95d9ea335a4225667ec0 (patch) | |
tree | 7d6cd1932afcad0a5619a5c504a6d93ca318187c /arch/arm/mach-s5p6442/clock.c | |
parent | e39d5ef678045d61812c1401f04fe8edb14d6359 (diff) | |
parent | 387c31c7e5c9805b0aef8833d1731a5fe7bdea14 (diff) | |
download | op-kernel-dev-d392da5207352f09030e95d9ea335a4225667ec0.zip op-kernel-dev-d392da5207352f09030e95d9ea335a4225667ec0.tar.gz |
Merge v2.6.37-rc8 into powerpc/next
Diffstat (limited to 'arch/arm/mach-s5p6442/clock.c')
-rw-r--r-- | arch/arm/mach-s5p6442/clock.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c index 087e57f..16d6e7e 100644 --- a/arch/arm/mach-s5p6442/clock.c +++ b/arch/arm/mach-s5p6442/clock.c @@ -192,6 +192,11 @@ static struct clk clk_pclkd1 = { .parent = &clk_hclkd1, }; +int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); +} + int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); @@ -335,6 +340,16 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) clk_pclkd1.rate = pclkd1; } +static struct clk init_clocks_disable[] = { + { + .name = "pdma", + .id = -1, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip0_ctrl, + .ctrlbit = (1 << 3), + }, +}; + static struct clk init_clocks[] = { { .name = "systimer", @@ -361,6 +376,12 @@ static struct clk init_clocks[] = { .enable = s5p6442_clk_ip3_ctrl, .ctrlbit = (1<<19), }, { + .name = "watchdog", + .id = -1, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1 << 22), + }, { .name = "timers", .id = -1, .parent = &clk_pclkd1, @@ -387,10 +408,23 @@ static struct clk *clks[] __initdata = { void __init s5p6442_register_clocks(void) { + struct clk *clkptr; + int i, ret; + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); + clkptr = init_clocks_disable; + for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) { + ret = s3c24xx_register_clock(clkptr); + if (ret < 0) { + printk(KERN_ERR "Fail to register clock %s (%d)\n", + clkptr->name, ret); + } else + (clkptr->enable)(clkptr, 0); + } + s3c_pwmclk_init(); } |