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| author | David S. Miller <davem@davemloft.net> | 2010-03-15 16:23:54 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-03-15 16:23:54 -0700 |
| commit | 4961e02f1999e1c3468c09b2669c94d7c3ae82a8 (patch) | |
| tree | 44c15abb09d7ba5e17a9aba95ee246648b1c1a8a /arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h | |
| parent | d14a0ebda7d3daede1a99c01527affb9ceaa4c22 (diff) | |
| parent | a3d3203e4bb40f253b1541e310dc0f9305be7c84 (diff) | |
| download | op-kernel-dev-4961e02f1999e1c3468c09b2669c94d7c3ae82a8.zip op-kernel-dev-4961e02f1999e1c3468c09b2669c94d7c3ae82a8.tar.gz | |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h')
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h new file mode 100644 index 0000000..6f25cd0 --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h @@ -0,0 +1,36 @@ +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * GPIO Bank J register and configuration definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define S3C64XX_GPJCON (S3C64XX_GPJ_BASE + 0x00) +#define S3C64XX_GPJDAT (S3C64XX_GPJ_BASE + 0x04) +#define S3C64XX_GPJPUD (S3C64XX_GPJ_BASE + 0x08) +#define S3C64XX_GPJCONSLP (S3C64XX_GPJ_BASE + 0x0c) +#define S3C64XX_GPJPUDSLP (S3C64XX_GPJ_BASE + 0x10) + +#define S3C64XX_GPJ_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) +#define S3C64XX_GPJ_INPUT(__gpio) (0x0 << ((__gpio) * 2)) +#define S3C64XX_GPJ_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) + +#define S3C64XX_GPJ0_VD16 (0x02 << 0) +#define S3C64XX_GPJ1_VD17 (0x02 << 2) +#define S3C64XX_GPJ2_VD18 (0x02 << 4) +#define S3C64XX_GPJ3_VD19 (0x02 << 6) +#define S3C64XX_GPJ4_VD20 (0x02 << 8) +#define S3C64XX_GPJ5_VD21 (0x02 << 10) +#define S3C64XX_GPJ6_VD22 (0x02 << 12) +#define S3C64XX_GPJ7_VD23 (0x02 << 14) +#define S3C64XX_GPJ8_LCD_HSYNC (0x02 << 16) +#define S3C64XX_GPJ9_LCD_VSYNC (0x02 << 18) +#define S3C64XX_GPJ10_LCD_VDEN (0x02 << 20) +#define S3C64XX_GPJ11_LCD_VCLK (0x02 << 22) |
