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author | Tomasz Figa <tomasz.figa@gmail.com> | 2011-08-19 11:54:31 +0200 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-09-19 16:38:11 +0900 |
commit | fb5d375d352ee5830b33ccdff06eb4f5f1d603f5 (patch) | |
tree | 97645e8b8f081a831ceb4b41a1945cc66d95b966 /arch/arm/mach-s3c64xx/clock.c | |
parent | d9018df00785d7ff52aa7fa8acfacd8a036fc832 (diff) | |
download | op-kernel-dev-fb5d375d352ee5830b33ccdff06eb4f5f1d603f5.zip op-kernel-dev-fb5d375d352ee5830b33ccdff06eb4f5f1d603f5.tar.gz |
ARM: S3C64XX: Add support for synchronous clock operation
Some boards based on S3C6410 use synchronous clocking, which means that HCLKx2
and other system clocks are generated from APLL instead of MPLL.
This patch adds support for such boards, by calculating hclk2 depending on
the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS regist
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/clock.c')
-rw-r--r-- | arch/arm/mach-s3c64xx/clock.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 8cf39e3..872e683 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -744,7 +744,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", apll, mpll, epll); - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) + /* Synchronous mode */ + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + else + /* Asynchronous mode */ + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); |