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| author | Ben Dooks <ben-linux@fluff.org> | 2009-03-25 11:01:24 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 11:04:58 +0100 |
| commit | 4faf6867638cc21aa43b4ca4ed0bdf14a2d29762 (patch) | |
| tree | 1fed91079785469a6f044900bd322166df37adbf /arch/arm/mach-s3c6410 | |
| parent | e074f9803227236252c8e7be16d836d709abff57 (diff) | |
| download | op-kernel-dev-4faf6867638cc21aa43b4ca4ed0bdf14a2d29762.zip op-kernel-dev-4faf6867638cc21aa43b4ca4ed0bdf14a2d29762.tar.gz | |
[ARM] S3C64XX: Add S3C6400 SDHCI setup support
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c6410')
| -rw-r--r-- | arch/arm/mach-s3c6410/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-s3c6410/setup-sdhci.c | 34 |
2 files changed, 1 insertions, 34 deletions
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig index 0c8df97..4f7ffc7 100644 --- a/arch/arm/mach-s3c6410/Kconfig +++ b/arch/arm/mach-s3c6410/Kconfig @@ -16,6 +16,7 @@ config CPU_S3C6410 config S3C6410_SETUP_SDHCI bool + select S3C64XX_SETUP_SDHCI_GPIO help Internal helper functions for S3C6410 based SDHCI systems diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c index 0b5788b..20666f3 100644 --- a/arch/arm/mach-s3c6410/setup-sdhci.c +++ b/arch/arm/mach-s3c6410/setup-sdhci.c @@ -21,8 +21,6 @@ #include <linux/mmc/card.h> #include <linux/mmc/host.h> -#include <mach/gpio.h> -#include <plat/gpio-cfg.h> #include <plat/regs-sdhci.h> #include <plat/sdhci.h> @@ -35,22 +33,6 @@ char *s3c6410_hsmmc_clksrcs[4] = { /* [3] = "48m", - note not succesfully used yet */ }; -void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - unsigned int gpio; - unsigned int end; - - end = S3C64XX_GPG(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); -} void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, void __iomem *r, @@ -84,19 +66,3 @@ void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, writel(ctrl3, r + S3C_SDHCI_CONTROL3); } -void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - unsigned int gpio; - unsigned int end; - - end = S3C64XX_GPH(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); -} |
