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| author | Heiko Stuebner <heiko@sntech.de> | 2013-05-21 01:01:33 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-05-21 01:01:33 +0900 |
| commit | 4c4e9759a6fa63c61f0d269150741feccdd33f06 (patch) | |
| tree | 1bb0f5e5286d207600aea7a9f8b25de4a7cc0484 /arch/arm/mach-s3c24xx/dma-s3c2412.c | |
| parent | f722406faae2d073cc1d01063d1123c35425939e (diff) | |
| download | op-kernel-dev-4c4e9759a6fa63c61f0d269150741feccdd33f06.zip op-kernel-dev-4c4e9759a6fa63c61f0d269150741feccdd33f06.tar.gz | |
ARM: S3C24XX: split s3c2412 spi dma channels
While s3c24xx before s3c2412 (2410, 2440, 2442) use one dma channel
for both sending and receiving spi data, all later s3c24xx socs use
separate channels.
To keep with the structure of "one spi channel" s3c2412 introduced
a channel_rx attribute to the map and selects the correct request
channel depending on the dma direction, hiding the underlying
separation from view.
The s3c24xx-spi driver, which would need this, currently does not
use dma at all, but as s3c2443 has both highspeed (spi0) and regular
(spi1) controllers and also uses the split scheme a future dma support
for s3c24xx-spi would in any case need to differentiate between
old-style and new-style spi channel structure.
Thus we can swtch to the split channel structure like in later socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/dma-s3c2412.c')
| -rw-r--r-- | arch/arm/mach-s3c24xx/dma-s3c2412.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c index ab1700e..22298ea 100644 --- a/arch/arm/mach-s3c24xx/dma-s3c2412.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c @@ -47,16 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { .channels = MAP(S3C2412_DMAREQSEL_SDI), .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), }, - [DMACH_SPI0] = { - .name = "spi0", - .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), + [DMACH_SPI0_RX] = { + .name = "spi0-rx", + .channels = MAP(S3C2412_DMAREQSEL_SPI0RX), .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), }, - [DMACH_SPI1] = { - .name = "spi1", - .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), + [DMACH_SPI0_TX] = { + .name = "spi0-tx", + .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), + .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0TX), + }, + [DMACH_SPI1_RX] = { + .name = "spi1-rx", + .channels = MAP(S3C2412_DMAREQSEL_SPI1RX), .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), }, + [DMACH_SPI1_TX] = { + .name = "spi1-tx", + .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), + .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1TX), + }, [DMACH_UART0] = { .name = "uart0", .channels = MAP(S3C2412_DMAREQSEL_UART0_0), |
