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author | Heiko Stuebner <heiko@sntech.de> | 2014-02-19 09:26:21 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-04-15 02:11:35 +0900 |
commit | dfc0f5099a83f8633fc4480e2f0e8e5f6ac1331d (patch) | |
tree | 4a49ac1f0df64ed9058e1c894e8f3ddc4ebc8a24 /arch/arm/mach-s3c24xx/common.c | |
parent | 8cb28748154db139180ea4e24252530aecc3745b (diff) | |
download | op-kernel-dev-dfc0f5099a83f8633fc4480e2f0e8e5f6ac1331d.zip op-kernel-dev-dfc0f5099a83f8633fc4480e2f0e8e5f6ac1331d.tar.gz |
ARM: S3C24XX: Convert s3c2416 and s3c2443 to common clock framework
This converts the mentioned platforms to use the newly introduced driver
for the common clock framework for them.
With this the whole legacy clock structure can go away too.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/common.c')
-rw-r--r-- | arch/arm/mach-s3c24xx/common.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 0fc6641..412ca00 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -145,7 +145,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32450003, .idmask = 0xffffffff, .map_io = s3c2416_map_io, - .init_clocks = s3c2416_init_clocks, .init_uarts = s3c2416_init_uarts, .init = s3c2416_init, .name = name_s3c2416, @@ -154,7 +153,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32443001, .idmask = 0xffffffff, .map_io = s3c2443_map_io, - .init_clocks = s3c2443_init_clocks, .init_uarts = s3c2443_init_uarts, .init = s3c2443_init, .name = name_s3c2443, @@ -536,3 +534,17 @@ struct platform_device s3c2443_device_dma = { }, }; #endif + +#ifdef CONFIG_CPU_S3C2416 +void __init s3c2416_init_clocks(int xtal) +{ + s3c2443_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR); +} +#endif + +#ifdef CONFIG_CPU_S3C2443 +void __init s3c2443_init_clocks(int xtal) +{ + s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); +} +#endif |