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author | Heiko Stuebner <heiko@sntech.de> | 2012-04-24 18:07:03 -0700 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-04-24 18:07:03 -0700 |
commit | 5c2f2917168e7a36c0fda0e7c2b0246c83eb7fe0 (patch) | |
tree | d649fcb8ba50b3f3c1f994c55d8d1315db636519 /arch/arm/mach-s3c24xx/common-s3c2443.c | |
parent | 97e1ed7960bc3b86c51aef8d3d014286032d476e (diff) | |
download | op-kernel-dev-5c2f2917168e7a36c0fda0e7c2b0246c83eb7fe0.zip op-kernel-dev-5c2f2917168e7a36c0fda0e7c2b0246c83eb7fe0.tar.gz |
ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi
Currently usable are busclk0 and busclk2.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/common-s3c2443.c')
-rw-r--r-- | arch/arm/mach-s3c24xx/common-s3c2443.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index 4604315..aeeb2be 100644 --- a/arch/arm/mach-s3c24xx/common-s3c2443.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c @@ -424,11 +424,6 @@ static struct clk init_clocks_off[] = { .enable = s3c2443_clkcon_enable_p, .ctrlbit = S3C2443_PCLKCON_IIS, }, { - .name = "hsspi", - .parent = &clk_p, - .enable = s3c2443_clkcon_enable_p, - .ctrlbit = S3C2443_PCLKCON_HSSPI, - }, { .name = "adc", .parent = &clk_p, .enable = s3c2443_clkcon_enable_p, @@ -562,6 +557,14 @@ static struct clk hsmmc1_clk = { .ctrlbit = S3C2443_HCLKCON_HSMMC, }; +static struct clk hsspi_clk = { + .name = "spi", + .devname = "s3c64xx-spi.0", + .parent = &clk_p, + .enable = s3c2443_clkcon_enable_p, + .ctrlbit = S3C2443_PCLKCON_HSSPI, +}; + /* EPLLCON compatible enough to get on/off information */ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) @@ -612,6 +615,7 @@ static struct clk *clks[] __initdata = { &clk_usb_bus, &clk_armdiv, &hsmmc1_clk, + &hsspi_clk, }; static struct clksrc_clk *clksrcs[] __initdata = { @@ -629,6 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk), CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk), + CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk), }; void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, |