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| author | Thomas Abraham <thomas.abraham@linaro.org> | 2012-07-13 07:15:14 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-07-13 15:23:46 +0900 |
| commit | a5238e360b715e9a1bb39d7d3537f78cc9e9e286 (patch) | |
| tree | b6503a7429b93b7c15f90d5e3b0124a191215423 /arch/arm/mach-s3c24xx/common-s3c2443.c | |
| parent | 2b54be661191532ddf1628c3b151b81ae8743caa (diff) | |
| download | op-kernel-dev-a5238e360b715e9a1bb39d7d3537f78cc9e9e286.zip op-kernel-dev-a5238e360b715e9a1bb39d7d3537f78cc9e9e286.tar.gz | |
spi: s3c64xx: move controller information into driver data
Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/common-s3c2443.c')
| -rw-r--r-- | arch/arm/mach-s3c24xx/common-s3c2443.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index aeeb2be..aeb4a24 100644 --- a/arch/arm/mach-s3c24xx/common-s3c2443.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c @@ -559,7 +559,7 @@ static struct clk hsmmc1_clk = { static struct clk hsspi_clk = { .name = "spi", - .devname = "s3c64xx-spi.0", + .devname = "s3c2443-spi.0", .parent = &clk_p, .enable = s3c2443_clkcon_enable_p, .ctrlbit = S3C2443_PCLKCON_HSSPI, @@ -633,7 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk), CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk), - CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk), + CLKDEV_INIT("s3c2443-spi.0", "spi_busclk0", &hsspi_clk), }; void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, |
