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author | Kukjin Kim <kgene.kim@samsung.com> | 2013-01-01 19:40:53 -0800 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-01-10 10:45:34 -0800 |
commit | fc351246e2a93961558c0028770f901a03e76f16 (patch) | |
tree | 189274daa982c7632d0fe3dd5dcc3354c485a9db /arch/arm/mach-s3c24xx/anubis.h | |
parent | 0a2691dade25dceb4b3982a7b4f749c708ac0b50 (diff) | |
download | op-kernel-dev-fc351246e2a93961558c0028770f901a03e76f16.zip op-kernel-dev-fc351246e2a93961558c0028770f901a03e76f16.tar.gz |
ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local
The headers can be local in mach-s3c24xx/.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/anubis.h')
-rw-r--r-- | arch/arm/mach-s3c24xx/anubis.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/anubis.h b/arch/arm/mach-s3c24xx/anubis.h new file mode 100644 index 0000000..2691665 --- /dev/null +++ b/arch/arm/mach-s3c24xx/anubis.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * ANUBIS - CPLD control constants + * ANUBIS - IRQ Number definitions + * ANUBIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_ANUBIS_H +#define __MACH_S3C24XX_ANUBIS_H __FILE__ + +/* CTRL2 - NAND WP control, IDE Reset assert/check */ + +#define ANUBIS_CTRL1_NANDSEL (0x3) + +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + +/* irq */ + +#define ANUBIS_IRQ_IDE0 IRQ_EINT2 +#define ANUBIS_IRQ_IDE1 IRQ_EINT3 +#define ANUBIS_IRQ_ASIX IRQ_EINT1 + +/* map */ + +/* start peripherals off after the S3C2410 */ + +#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) + +#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) +#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD + +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23)) + +#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) +#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) +#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) +#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) + +#endif /* __MACH_S3C24XX_ANUBIS_H */ |