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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-05 18:21:21 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-05 18:21:21 -0700 |
commit | c861cd3e92d92ae946e19099f198018fcb4fd887 (patch) | |
tree | fab678a30a85cf80038c560221d6ab01812a3891 /arch/arm/mach-s3c2416 | |
parent | 7abec10c623d9e0416dab6919a0ea22e6283516b (diff) | |
parent | b8bc83971cc20cae3c3b65c26a804f350d74960c (diff) | |
download | op-kernel-dev-c861cd3e92d92ae946e19099f198018fcb4fd887.zip op-kernel-dev-c861cd3e92d92ae946e19099f198018fcb4fd887.tar.gz |
Merge branch 'next/devel2' of git://git.linaro.org/people/arnd/arm-soc
* 'next/devel2' of git://git.linaro.org/people/arnd/arm-soc: (30 commits)
ARM: mmp: register internal sram bank
ARM: mmp: register audio sram bank
ARM: mmp: add sram allocator
gpio/samsung: Complain loudly if we don't know the SoC
ARM: S3C64XX: Fix SoC identification for S3C64xx devices
ARM: S3C2443: Remove redundant s3c_register_clocks call for init_clocks
ARM: S3C24XX: Add devname for hsmmc1 pclk
ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks
ARM: S3C2443: Accommodate cpufreq frequency scheme in armdiv
ARM: S3C2443: handle unset armdiv values gracefully
ARM: S3C2443: Add get_rate operation for clk_armdiv
ARM: S3C2416: Add comment describing the armdiv/armclk
ARM: S3C2443: Move clk_arm and clk_armdiv to common code
ARM: S3C24XX: Add infrastructure to transmit armdiv to common code
ARM: S3C2416: Add armdiv_mask constant
ARM: EXYNOS4: Add support for M-5MOLS camera on Nuri board
ARM: EXYNOS4: Enable MFC on ORIGEN
ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450
ARM: SAMSUNG: Add support s3c2443-adc for S3C2443
ARM: SAMSUNG: Allow overriding of adc device name for S3C24XX
...
Diffstat (limited to 'arch/arm/mach-s3c2416')
-rw-r--r-- | arch/arm/mach-s3c2416/clock.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-s3c2416/s3c2416.c | 3 |
2 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 72b7c62..afbbe8b 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -28,6 +28,14 @@ #include <mach/regs-clock.h> #include <mach/regs-s3c2443-clock.h> +/* armdiv + * + * this clock is sourced from msysclk and can have a number of + * divider values applied to it to then be fed into armclk. + * The real clock definition is done in s3c2443-clock.c, + * only the armdiv divisor table must be defined here. +*/ + static unsigned int armdiv[8] = { [0] = 1, [1] = 2, @@ -125,16 +133,9 @@ static struct clk hsmmc0_clk = { .ctrlbit = S3C2416_HCLKCON_HSMMC0, }; -static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) -{ - clkcon0 &= 7 << S3C2443_CLKDIV0_ARMDIV_SHIFT; - - return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; -} - void __init_or_cpufreq s3c2416_setup_clocks(void) { - s3c2443_common_setup_clocks(s3c2416_get_pll, s3c2416_fclk_div); + s3c2443_common_setup_clocks(s3c2416_get_pll); } @@ -158,7 +159,9 @@ void __init s3c2416_init_clocks(int xtal) clk_epll.parent = &clk_epllref.clk; - s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div); + s3c2443_common_init_clocks(xtal, s3c2416_get_pll, + armdiv, ARRAY_SIZE(armdiv), + S3C2416_CLKDIV0_ARMDIV_MASK); for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) s3c_register_clksrc(clksrcs[ptr], 1); diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 7dbee81..ee214bc 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -60,6 +60,7 @@ #include <plat/iic-core.h> #include <plat/fb-core.h> #include <plat/nand-core.h> +#include <plat/adc-core.h> static struct map_desc s3c2416_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -97,6 +98,8 @@ int __init s3c2416_init(void) s3c_fb_setname("s3c2443-fb"); + s3c_adc_setname("s3c2416-adc"); + #ifdef CONFIG_PM register_syscore_ops(&s3c2416_pm_syscore_ops); #endif |