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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 09:54:01 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 09:54:01 +0100 |
commit | 29cb3cd208dd0e4471bb80bec4facc49ceb199fa (patch) | |
tree | 035128bf7af997d5e1e5208c900ba78c5a1df46d /arch/arm/mach-s3c2412 | |
parent | cbe263497def23befb6f475977661bae5d1f82e4 (diff) | |
download | op-kernel-dev-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.zip op-kernel-dev-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.tar.gz |
ARM: pm: allow suspend finisher to return error codes
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.
Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack. Also omit the tlb flush as no
changes to the page tables will have happened.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2412')
-rw-r--r-- | arch/arm/mach-s3c2412/pm.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c index 9a1fb89..f4077ef 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c2412/pm.c @@ -37,7 +37,7 @@ extern void s3c2412_sleep_enter(void); -static void s3c2412_cpu_suspend(unsigned long arg) +static int s3c2412_cpu_suspend(unsigned long arg) { unsigned long tmp; @@ -48,6 +48,8 @@ static void s3c2412_cpu_suspend(unsigned long arg) __raw_writel(tmp, S3C2412_PWRCFG); s3c2412_sleep_enter(); + + panic("sleep resumed to originator?"); } static void s3c2412_pm_prepare(void) |