diff options
| author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2007-10-16 01:28:58 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 09:43:16 -0700 |
| commit | f28ef573ad09596b771b67c276bbc5f49281fa9d (patch) | |
| tree | 5061be2ae82f513a8c23e220b8a97f30b08ec34a /arch/arm/mach-s3c2410/mach-h1940.c | |
| parent | 9939a481cd66a109e4ad09328df1bd0540e0aa84 (diff) | |
| download | op-kernel-dev-f28ef573ad09596b771b67c276bbc5f49281fa9d.zip op-kernel-dev-f28ef573ad09596b771b67c276bbc5f49281fa9d.tar.gz | |
s3c2410fb: remove lcdcon3 register from s3c2410fb_display
This patch removes unused lcdcon3 register from the
s3c2410fb_display structure.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/mach-s3c2410/mach-h1940.c')
| -rw-r--r-- | arch/arm/mach-s3c2410/mach-h1940.c | 36 |
1 files changed, 15 insertions, 21 deletions
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 372caa2..52d7685 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -134,27 +134,21 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { * Set lcd on or off **/ static struct s3c2410fb_display h1940_lcd __initdata = { - .regs={ - .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \ - S3C2410_LCDCON1_TFT | \ - S3C2410_LCDCON1_CLKVAL(0x0C), - - .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \ - S3C2410_LCDCON2_LINEVAL(319) | \ - S3C2410_LCDCON2_VFPD(6) | \ - S3C2410_LCDCON2_VSPW(0), - - .lcdcon3= S3C2410_LCDCON3_HBPD(19) | \ - S3C2410_LCDCON3_HOZVAL(239) | \ - S3C2410_LCDCON3_HFPD(7), - - .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \ - S3C2410_LCDCON4_HSPW(3), - - .lcdcon5= S3C2410_LCDCON5_FRM565 | \ - S3C2410_LCDCON5_INVVLINE | \ - S3C2410_LCDCON5_HWSWP, - }, + .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \ + S3C2410_LCDCON1_TFT | \ + S3C2410_LCDCON1_CLKVAL(0x0C), + + .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \ + S3C2410_LCDCON2_LINEVAL(319) | \ + S3C2410_LCDCON2_VFPD(6) | \ + S3C2410_LCDCON2_VSPW(0), + + .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \ + S3C2410_LCDCON4_HSPW(3), + + .lcdcon5= S3C2410_LCDCON5_FRM565 | \ + S3C2410_LCDCON5_INVVLINE | \ + S3C2410_LCDCON5_HWSWP, .type = S3C2410_LCDCON1_TFT, .width = 240, |
