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authorCatalin Marinas <catalin.marinas@arm.com>2008-12-01 14:54:57 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2008-12-01 14:54:57 +0000
commitebac6546df7e8bd17f66f029c616ea9ee3c595ae (patch)
tree98801f44053407dc2990b16fbcfdbc5cb770416c /arch/arm/mach-realview/include
parent4c3ea3717103ffcccfaebedb98c2dadfb54e0482 (diff)
downloadop-kernel-dev-ebac6546df7e8bd17f66f029c616ea9ee3c595ae.zip
op-kernel-dev-ebac6546df7e8bd17f66f029c616ea9ee3c595ae.tar.gz
RealView: Use only the shadow mapping of ARM11MPCore local timers
All the cases where the local timer for a CPU is accessed happen on the corresponding current CPU, hence no need to access the per-CPU local timer mappings. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview/include')
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h6
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h3
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index e1a6df2..cdbf551 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE 0x10100700
-#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
+#define REALVIEW_EB11MP_TWD_BASE 0x10100600
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
#else
#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE 0x1F000700
-#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
+#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e5..53ea0e7 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
*/
#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
-#define REALVIEW_TC11MP_TWD_BASE 0x1F000700
-#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
+#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
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