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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-11-08 23:35:46 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-11-08 23:35:46 +0000
commit91bc51d8a10b00d8233dd5b6f07d7eb40828b87d (patch)
tree35acc012af09a987364f39d0a5ccda7c4be35a3e /arch/arm/mach-pxa/time.c
parentc2ec21c5c8f15c079c209f403d582f3134785060 (diff)
downloadop-kernel-dev-91bc51d8a10b00d8233dd5b6f07d7eb40828b87d.zip
op-kernel-dev-91bc51d8a10b00d8233dd5b6f07d7eb40828b87d.tar.gz
[ARM] pxa: fix one-shot timer mode
One-shot timer mode on PXA has various bugs which prevent kernels build with NO_HZ enabled booting. They end up spinning on a permanently asserted timer interrupt because we don't properly clear it down - clearing the OIER bit does not stop the pending interrupt status. Fix this in the set_mode handler as well. Moreover, the code which sets the next expiry point may race with the hardware, and we might not set the match register sufficiently in the future. If we encounter that situation, return -ETIME so the generic time code retries. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/time.c')
-rw-r--r--arch/arm/mach-pxa/time.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index a2d45d7..fbfa192 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -68,6 +68,7 @@ pxa_ost0_interrupt(int irq, void *dev_id)
if (c->mode == CLOCK_EVT_MODE_ONESHOT) {
/* Disarm the compare/match, signal the event. */
OIER &= ~OIER_E0;
+ OSSR = OSSR_M0;
c->event_handler(c);
} else if (c->mode == CLOCK_EVT_MODE_PERIODIC) {
/* Call the event handler as many times as necessary
@@ -100,9 +101,9 @@ pxa_ost0_interrupt(int irq, void *dev_id)
* anything that might put us "very close".
*/
#define MIN_OSCR_DELTA 16
- do {
+ do {
OSSR = OSSR_M0;
- next_match = (OSMR0 += LATCH);
+ next_match = (OSMR0 += LATCH);
c->event_handler(c);
} while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA)
&& (c->mode == CLOCK_EVT_MODE_PERIODIC));
@@ -114,14 +115,16 @@ pxa_ost0_interrupt(int irq, void *dev_id)
static int
pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
{
- unsigned long irqflags;
+ unsigned long flags, next, oscr;
- raw_local_irq_save(irqflags);
- OSMR0 = OSCR + delta;
- OSSR = OSSR_M0;
+ raw_local_irq_save(flags);
OIER |= OIER_E0;
- raw_local_irq_restore(irqflags);
- return 0;
+ next = OSCR + delta;
+ OSMR0 = next;
+ oscr = OSCR;
+ raw_local_irq_restore(flags);
+
+ return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
}
static void
@@ -132,15 +135,16 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
raw_local_irq_save(irqflags);
- OSMR0 = OSCR + LATCH;
OSSR = OSSR_M0;
OIER |= OIER_E0;
+ OSMR0 = OSCR + LATCH;
raw_local_irq_restore(irqflags);
break;
case CLOCK_EVT_MODE_ONESHOT:
raw_local_irq_save(irqflags);
OIER &= ~OIER_E0;
+ OSSR = OSSR_M0;
raw_local_irq_restore(irqflags);
break;
@@ -149,6 +153,7 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
/* initializing, released, or preparing for suspend */
raw_local_irq_save(irqflags);
OIER &= ~OIER_E0;
+ OSSR = OSSR_M0;
raw_local_irq_restore(irqflags);
break;
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