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authorKevin Hilman <khilman@linaro.org>2013-12-20 11:27:12 -0800
committerKevin Hilman <khilman@linaro.org>2013-12-20 11:28:30 -0800
commit95fcfa70f3bc4b3b82bf582fa5b24a39bdbd23ae (patch)
tree9809f3d006ef319b1fe43bd82b159ea1d0b7b818 /arch/arm/mach-pxa/include
parentcd15c51d6c2f577f896471a058f33a95f164dba2 (diff)
parent23de2278ebc3a2f971ce45ca5e5e35c9d5a74040 (diff)
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Merge tag 'renesas-fixes-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman: Renesas ARM based SoC fixes for v3.13 * r8a7790 (R-Car H1) SoC - Correct GPIO resources in DT. This problem has been present since GPIOs were added to the r8a7790 SoC by f98e10c88aa95bf7 ("ARM: shmobile: r8a7790: Add GPIO controller devices to device tree") in v3.12-rc1. * irqchip renesas-intc-irqpin - Correct register bitfield shift calculation This bug has been present since the renesas-intc-irqpin driver was introduced by 443580486e3b9657 ("irqchip: Renesas INTC External IRQ pin driver") in v3.10-rc1 * Lager board - Do not build the phy fixup unless CONFIG_PHYLIB is enabled This problem was introduced by 48c8b96f21817aad * tag 'renesas-fixes-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: Fix GPIO resources in DTS irqchip: renesas-intc-irqpin: Fix register bitfield shift calculation ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB Signed-off-by: Kevin Hilman <khilman@linaro.org>
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