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authorBarry Song <Baohua.Song@csr.com>2012-06-19 15:00:05 +0800
committerBarry Song <Barry.Song@csr.com>2012-07-02 10:59:07 +0800
commit5130216265f6f924a4ba8214787241be96d93467 (patch)
tree8e05e98068f0380376735a8575af9bb42ab27502 /arch/arm/mach-prima2/include/mach/gpio.h
parentca24a145573124732152daff105ba68cc9a2b545 (diff)
downloadop-kernel-dev-5130216265f6f924a4ba8214787241be96d93467.zip
op-kernel-dev-5130216265f6f924a4ba8214787241be96d93467.tar.gz
PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
In SiRFprimaII, Each GPIO pin can be configured as input or output independently. If a GPIO is configured as input, it can also be enabled as an interrupt source (either edge or level triggered). These pins must be either MUXed as GPIO or other function pads. Signed-off-by: Yuping Luo <yuping.luo@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-prima2/include/mach/gpio.h')
-rw-r--r--arch/arm/mach-prima2/include/mach/gpio.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-prima2/include/mach/gpio.h b/arch/arm/mach-prima2/include/mach/gpio.h
new file mode 100644
index 0000000..1904bb0
--- /dev/null
+++ b/arch/arm/mach-prima2/include/mach/gpio.h
@@ -0,0 +1,13 @@
+#ifndef __MACH_GPIO_H
+#define __MACH_GPIO_H
+
+/* Pull up/down values */
+enum sirfsoc_gpio_pull {
+ SIRFSOC_GPIO_PULL_NONE,
+ SIRFSOC_GPIO_PULL_UP,
+ SIRFSOC_GPIO_PULL_DOWN,
+};
+
+void sirfsoc_gpio_set_pull(unsigned gpio, unsigned mode);
+
+#endif
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