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authorAndrew Lunn <andrew@lunn.ch>2011-05-15 13:32:51 +0200
committerNicolas Pitre <nico@fluxnic.net>2011-05-16 15:16:17 -0400
commit44350061905b2a502579d3827eacaf8efa393aad (patch)
tree33c66c67205e2fd48cae80dd29db1c755ddb94fb /arch/arm/mach-orion5x
parent9e613f8a7904f2b7516eed08f413463c579325bd (diff)
downloadop-kernel-dev-44350061905b2a502579d3827eacaf8efa393aad.zip
op-kernel-dev-44350061905b2a502579d3827eacaf8efa393aad.tar.gz
ARM: orion: Consolidate setup of the crypto engine.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r--arch/arm/mach-orion5x/common.c36
1 files changed, 7 insertions, 29 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8bbf497c..0ab531d 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -164,41 +164,19 @@ void __init orion5x_xor_init(void)
IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
}
-static struct resource orion5x_crypto_res[] = {
- {
- .name = "regs",
- .start = ORION5X_CRYPTO_PHYS_BASE,
- .end = ORION5X_CRYPTO_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = "sram",
- .start = ORION5X_SRAM_PHYS_BASE,
- .end = ORION5X_SRAM_PHYS_BASE + SZ_8K - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .name = "crypto interrupt",
- .start = IRQ_ORION5X_CESA,
- .end = IRQ_ORION5X_CESA,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device orion5x_crypto_device = {
- .name = "mv_crypto",
- .id = -1,
- .num_resources = ARRAY_SIZE(orion5x_crypto_res),
- .resource = orion5x_crypto_res,
-};
-
-static int __init orion5x_crypto_init(void)
+/*****************************************************************************
+ * Cryptographic Engines and Security Accelerator (CESA)
+ ****************************************************************************/
+static void __init orion5x_crypto_init(void)
{
int ret;
ret = orion5x_setup_sram_win();
if (ret)
- return ret;
+ return;
- return platform_device_register(&orion5x_crypto_device);
+ orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
+ SZ_8K, IRQ_ORION5X_CESA);
}
/*****************************************************************************
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