Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next

Pull part one of ARM SoC updates from Olof Johansson:
 "A quite large set of SoC updates this cycle.  In no particular order:

   - Multi-cluster power management for Samsung Exynos, adding support
     for big.LITTLE CPU switching on EXYNOS5

   - SMP support for Marvell Armada 375 and 38x

   - SMP rework on Allwinner A31

   - Xilinx Zynq support for SOC_BUS, big endian

   - Marvell orion5x platform cleanup, modernizing the implementation
     and moving to DT.

   - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
     that their platform can be enabled in the same kernel binary as
     most of the other v7 platforms in the tree.  \o/

     The work isn't quite complete, there's some driver fixes still
     needed, but the basics now work.

  New SoC support added:

   - Freescale i.MX6SX

   - LSI Axxia AXM55xx SoCs

   - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800

   - STi STIH407

  plus a large set of various smaller updates for different platforms.
  I'm probably missing some important one here"

* tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits)
  ARM: exynos: don't run exynos4 l2x0 setup on other platforms
  ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug
  ARM: EXYNOS: mcpm rename the power_down_finish
  ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC
  ARM: EXYNOS: Enable multi-platform build support
  ARM: EXYNOS: Consolidate Kconfig entries
  ARM: EXYNOS: Add support for EXYNOS5410 SoC
  ARM: EXYNOS: Support secondary CPU boot of Exynos3250
  ARM: EXYNOS: Add Exynos3250 SoC ID
  ARM: EXYNOS: Add 5800 SoC support
  ARM: EXYNOS: initial board support for exynos5260 SoC
  clk: exynos5410: register clocks using common clock framework
  ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
  ARM: sunxi: allow building without reset controller
  Documentation: devicetree: arm: sort enable-method entries
  ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
  clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks
  ARM: dts: axxia: Add reset controller
  power: reset: Add Axxia system reset driver
  ARM: axxia: Adding defconfig for AXM55xx
  ...

1 files changed, 90 insertions, 0 deletions

diff --git a/arch/arm/mach-orion5x/board-mss2.c b/arch/arm/mach-orion5x/board-mss2.c
new file mode 100644
index 0000000..66f9c3b
--- /dev/null
+++ b/arch/arm/mach-orion5x/board-mss2.c
@@ -0,0 +1,90 @@
+/*
+ * Maxtor Shared Storage II Board Setup
+ *
+ * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/orion5x.h>
+#include <mach/bridge-regs.h>
+#include "common.h"
+
+/*****************************************************************************
+ * Maxtor Shared Storage II Info
+ ****************************************************************************/
+
+/****************************************************************************
+ * PCI setup
+ ****************************************************************************/
+static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	int irq;
+
+	/*
+	 * Check for devices with hard-wired IRQs.
+	 */
+	irq = orion5x_pci_map_irq(dev, slot, pin);
+	if (irq != -1)
+		return irq;
+
+	return -1;
+}
+
+static struct hw_pci mss2_pci __initdata = {
+	.nr_controllers = 2,
+	.setup		= orion5x_pci_sys_setup,
+	.scan		= orion5x_pci_sys_scan_bus,
+	.map_irq	= mss2_pci_map_irq,
+};
+
+static int __init mss2_pci_init(void)
+{
+	if (machine_is_mss2())
+		pci_common_init(&mss2_pci);
+
+	return 0;
+}
+subsys_initcall(mss2_pci_init);
+
+/*****************************************************************************
+ * MSS2 power off method
+ ****************************************************************************/
+/*
+ * On the Maxtor Shared Storage II, the shutdown process is the following :
+ * - Userland modifies U-boot env to tell U-boot to go idle at next boot
+ * - The board reboots
+ * - U-boot starts and go into an idle mode until the user press "power"
+ */
+static void mss2_power_off(void)
+{
+	u32 reg;
+
+	/*
+	 * Enable and issue soft reset
+	 */
+	reg = readl(RSTOUTn_MASK);
+	reg |= 1 << 2;
+	writel(reg, RSTOUTn_MASK);
+
+	reg = readl(CPU_SOFT_RESET);
+	reg |= 1;
+	writel(reg, CPU_SOFT_RESET);
+}
+
+void __init mss2_init(void)
+{
+	/* register mss2 specific power-off method */
+	pm_power_off = mss2_power_off;
+}