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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-03-27 14:51:39 -0400 |
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committer | Nicolas Pitre <nico@marvell.com> | 2008-03-27 14:51:39 -0400 |
commit | 15a32632d94011911497052a96cdbf3b905b325d (patch) | |
tree | 75d5d0c378157f19ccd12a1615a83c6aa2226689 /arch/arm/mach-orion/addr-map.c | |
parent | 92aecfa95523384923b52c8ddaf948fc02a53e82 (diff) | |
download | op-kernel-dev-15a32632d94011911497052a96cdbf3b905b325d.zip op-kernel-dev-15a32632d94011911497052a96cdbf3b905b325d.tar.gz |
sata_mv: mbus decode window support
Make it possible to pass mbus_dram_target_info to the sata_mv
driver via the platform data, make the sata_mv driver program
the window registers based on this data if it is passed in, and
make the Orion platform setup code use this method instead of
programming the SATA mbus window registers by hand.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion/addr-map.c')
-rw-r--r-- | arch/arm/mach-orion/addr-map.c | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c index 40bcb98..3de5de9 100644 --- a/arch/arm/mach-orion/addr-map.c +++ b/arch/arm/mach-orion/addr-map.c @@ -103,13 +103,6 @@ #define ETH_MAX_WIN 6 #define ETH_MAX_REMAP_WIN 4 -/* - * SATA Address Decode Windows registers - */ -#define SATA_WIN_CTRL(win) ORION_SATA_REG(0x30 + ((win) * 0x10)) -#define SATA_WIN_BASE(win) ORION_SATA_REG(0x34 + ((win) * 0x10)) -#define SATA_MAX_WIN 4 - struct mbus_dram_target_info orion_mbus_dram_info; @@ -288,35 +281,3 @@ void __init orion_setup_eth_wins(void) } } } - -void __init orion_setup_sata_wins(void) -{ - int i; - - /* - * First, disable and clear windows - */ - for (i = 0; i < SATA_MAX_WIN; i++) { - orion_write(SATA_WIN_BASE(i), 0); - orion_write(SATA_WIN_CTRL(i), 0); - } - - /* - * Setup windows for DDR banks. - */ - for (i = 0; i < DDR_MAX_CS; i++) { - u32 base, size; - size = orion_read(DDR_SIZE_CS(i)); - base = orion_read(DDR_BASE_CS(i)); - if (size & DDR_BANK_EN) { - base = DDR_REG_TO_BASE(base); - size = DDR_REG_TO_SIZE(size); - orion_write(SATA_WIN_CTRL(i), - ((size-1) & 0xffff0000) | - (ATTR_DDR_CS(i) << 8) | - (TARGET_DDR << 4) | WIN_EN); - orion_write(SATA_WIN_BASE(i), - base & 0xffff0000); - } - } -} |