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authorTony Lindgren <tony@atomide.com>2018-02-09 09:40:19 -0800
committerTony Lindgren <tony@atomide.com>2018-02-28 14:46:53 -0800
commit2402ff05c6e6ba21ddc7938f21464f2a0b66e744 (patch)
treed4cf091e874951a8612c3aae490e56d1f53e8d88 /arch/arm/mach-omap2
parent1ff4cb677dcac953514473971866a791400bbc5a (diff)
downloadop-kernel-dev-2402ff05c6e6ba21ddc7938f21464f2a0b66e744.zip
op-kernel-dev-2402ff05c6e6ba21ddc7938f21464f2a0b66e744.tar.gz
ARM: OMAP2+: Use v7_invalidate_l1 in omap4_finish_suspend
We can use just v7_invalidate_l1 here instead of v7_flush_dcache_all like the comments say. Cc: Tero Kristo <t-kristo@ti.com> Cc: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 56dfa2d5..0cae3b0 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -90,12 +90,7 @@ skip_secure_l1_clean:
mcr p15, 0, r0, c1, c0, 0
isb
- /*
- * Invalidate L1 data cache. Even though only invalidate is
- * necessary exported flush API is used here. Doing clean
- * on already clean cache would be almost NOP.
- */
- bl v7_flush_dcache_all
+ bl v7_invalidate_l1
/*
* Switch the CPU from Symmetric Multiprocessing (SMP) mode
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