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authorMarc Zyngier <marc.zyngier@arm.com>2015-01-17 10:21:08 +0000
committerTony Lindgren <tony@atomide.com>2015-01-17 08:56:12 -0800
commit0fb22a8fb7f3bc1b00a36d4a97ce4f93191f7559 (patch)
tree888e0445b2ceab5ec0774990e963defe7858f926 /arch/arm/mach-omap2/twl-common.c
parent8c6067355f72e330695968601f0aef3436b473ce (diff)
downloadop-kernel-dev-0fb22a8fb7f3bc1b00a36d4a97ce4f93191f7559.zip
op-kernel-dev-0fb22a8fb7f3bc1b00a36d4a97ce4f93191f7559.tar.gz
ARM: OMAP: Work around hardcoded interrupts
Commit 9a1091ef0017 ("irqchip: gic: Support hierarchy irq domain") changed the GIC driver to use a non-legacy IRQ domain on DT platforms. This patch assumes that DT-driven systems are getting all of their interrupts from device tree. Turns out that OMAP has quite a few hidden gems, and still uses hardcoded interrupts despite having fairly complete DTs. This patch attempts to work around these by offering a translation method that can be called directly from the hwmod code, if present. The same hack is sprinkled over PRCM and TWL. It isn't pretty, but it seems to do the job without having to add more hacks to the interrupt controller code. Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nishanth Menon <nm@ti.com> [tony@atomide.com: updated to fix make randconfig issue] Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/twl-common.c')
-rw-r--r--arch/arm/mach-omap2/twl-common.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4457e73..292eca0 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -66,19 +66,24 @@ void __init omap_pmic_init(int bus, u32 clkrate,
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
}
+#ifdef CONFIG_ARCH_OMAP4
void __init omap4_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data,
struct i2c_board_info *devices, int nr_devices)
{
/* PMIC part*/
+ unsigned int irq;
+
omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
- omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
+ irq = omap4_xlate_irq(7 + OMAP44XX_IRQ_GIC_START);
+ omap_pmic_init(1, 400, pmic_type, irq, pmic_data);
/* Register additional devices on i2c1 bus if needed */
if (devices)
i2c_register_board_info(1, devices, nr_devices);
}
+#endif
void __init omap_pmic_late_init(void)
{
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