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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-28 17:57:30 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-28 17:57:30 -0800 |
| commit | 4f427634b127f5fdc4e9fd2e5780f0a6caef936b (patch) | |
| tree | 1c1651abea7d54a9de8d852030a344a1705253f6 /arch/arm/mach-omap2/timer-gp.c | |
| parent | 7f233dee2149245bc7ee1194c31a04ea43cd127e (diff) | |
| parent | 02fa9f0451ac639a687bfc145eefe58703ff220e (diff) | |
| download | op-kernel-dev-4f427634b127f5fdc4e9fd2e5780f0a6caef936b.zip op-kernel-dev-4f427634b127f5fdc4e9fd2e5780f0a6caef936b.tar.gz | |
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
omap4: prcm: Fix the CPUx clockdomain offsets
OMAP2+: clocksource: fix crash on boot when !CONFIG_OMAP_32K_TIMER
OMAP2/3: clock: fix fint calculation for DPLL_FREQSEL
OMAP2+: mailbox: fix lookups for multiple mailboxes
OMAP2420: mailbox: fix IVA vs DSP IRQ numbering
mach-omap2: smartreflex: world-writable debugfs voltage files
mach-omap2: pm: world-writable debugfs timer files
mach-omap2: mux: world-writable debugfs files
Diffstat (limited to 'arch/arm/mach-omap2/timer-gp.c')
| -rw-r--r-- | arch/arm/mach-omap2/timer-gp.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 7b7c268..0fc550e 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -39,6 +39,7 @@ #include <asm/mach/time.h> #include <plat/dmtimer.h> #include <asm/localtimer.h> +#include <asm/sched_clock.h> #include "timer-gp.h" @@ -190,6 +191,7 @@ static void __init omap2_gp_clocksource_init(void) /* * clocksource */ +static DEFINE_CLOCK_DATA(cd); static struct omap_dm_timer *gpt_clocksource; static cycle_t clocksource_read_cycles(struct clocksource *cs) { @@ -204,6 +206,15 @@ static struct clocksource clocksource_gpt = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +static void notrace dmtimer_update_sched_clock(void) +{ + u32 cyc; + + cyc = omap_dm_timer_read_counter(gpt_clocksource); + + update_sched_clock(&cd, cyc, (u32)~0); +} + /* Setup free-running counter for clocksource */ static void __init omap2_gp_clocksource_init(void) { @@ -224,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void) omap_dm_timer_set_load_start(gpt, 1, 0); + init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); + if (clocksource_register_hz(&clocksource_gpt, tick_rate)) printk(err2, clocksource_gpt.name); } |
