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author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
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committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
commit | a64bb9cda8b12f599766c7dfe81770d2082a133a (patch) | |
tree | 29886a8c126757dde407a315220e69d1b6a4554a /arch/arm/mach-omap2/powerdomain44xx.c | |
parent | c4d7e58fb52c632d8e33cd23a4917d7a7f8302ac (diff) | |
download | op-kernel-dev-a64bb9cda8b12f599766c7dfe81770d2082a133a.zip op-kernel-dev-a64bb9cda8b12f599766c7dfe81770d2082a133a.tar.gz |
OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions
OMAP4 powerdomain control registers are split between the PRM hardware
module and the PRCM_MPU local PRCM. Add this PRCM partition
information to each OMAP4 powerdomain record, and convert the OMAP4
powerdomain function implementations to use the OMAP4 PRM instance
functions.
Also fixes a potential null pointer dereference of pwrdm->name.
The autogeneration scripts have been updated.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: BenoƮt Cousson <b-cousson@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain44xx.c')
-rw-r--r-- | arch/arm/mach-omap2/powerdomain44xx.c | 122 |
1 files changed, 84 insertions, 38 deletions
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c index 4c5ab1a..28bf5e3 100644 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ b/arch/arm/mach-omap2/powerdomain44xx.c @@ -20,48 +20,70 @@ #include <plat/prcm.h> #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include "prminst44xx.h" #include "prm-regbits-44xx.h" #include "powerdomains.h" static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { - omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; } static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; } static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; } static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, - OMAP4430_LASTPOWERSTATEENTERED_MASK); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; + v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; + + return v; } static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) { - omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, - (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, + (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; } static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) { - omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, - OMAP4430_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_offs, OMAP4_PM_PWSTST); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, + OMAP4430_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTST); return 0; } @@ -70,69 +92,91 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) u32 v; v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); - omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); return 0; } static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) + u8 pwrst) { u32 m; m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); return 0; } static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) + u8 pwrst) { u32 m; m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); return 0; } static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, - OMAP4430_LOGICSTATEST_MASK); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LOGICSTATEST_MASK; + v >>= OMAP4430_LOGICSTATEST_SHIFT; + + return v; } static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL, - OMAP4430_LOGICRETSTATE_MASK); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP4430_LOGICRETSTATE_MASK; + v >>= OMAP4430_LOGICRETSTATE_SHIFT; + + return v; } static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) { - u32 m; + u32 m, v; m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, - m); + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= m; + v >>= __ffs(m); + + return v; } static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) { - u32 m; + u32 m, v; m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL, m); + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= m; + v >>= __ffs(m); + + return v; } static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) @@ -146,14 +190,16 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) */ /* XXX Is this udelay() value meaningful? */ - while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) & + while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, + pwrdm->prcm_offs, + OMAP4_PM_PWSTST) & OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); if (c > PWRDM_TRANSITION_BAILOUT) { printk(KERN_ERR "powerdomain: waited too long for " - "powerdomain %s to complete transition\n", pwrdm->name); + "powerdomain %s to complete transition\n", pwrdm->name); return -EAGAIN; } |