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authorMike Turquette <mturquette@ti.com>2012-09-19 18:04:14 -0600
committerPaul Walmsley <paul@pwsan.com>2012-09-22 10:52:59 -0600
commitf19a302247735876e08e95966ff5668e01946972 (patch)
tree857a144b474c27647671695cf7b91fc480907d79 /arch/arm/mach-omap2/pm.c
parent5dcc3b975e972989574c009457f0e333c342910d (diff)
downloadop-kernel-dev-f19a302247735876e08e95966ff5668e01946972.zip
op-kernel-dev-f19a302247735876e08e95966ff5668e01946972.tar.gz
ARM: OMAP4: cm: add bitfield width values
The new common clk framework includes basic definitions for mux and divider clocks. These definitions depend on shift and width values instead of the pre-computed masks that the OMAP clk framework has traditionally used when accessing the register to control the mux or divisor. To ease this transition the masks are left intact and the width field is simply added alongside the shift and mask data. Signed-off-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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