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author | Ingo Molnar <mingo@kernel.org> | 2014-06-06 07:55:06 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2014-06-06 07:55:06 +0200 |
commit | ec00010972a0971b2c1da4fbe4e5c7d8ed1ecb05 (patch) | |
tree | c28975d7daf6d8a3aa23afe8f42837b71105b269 /arch/arm/mach-omap2/omap-headsmp.S | |
parent | 8c6e549a447c51f4f8c0ba7f1e444469f75a354a (diff) | |
parent | e041e328c4b41e1db79bfe5ba9992c2ed771ad19 (diff) | |
download | op-kernel-dev-ec00010972a0971b2c1da4fbe4e5c7d8ed1ecb05.zip op-kernel-dev-ec00010972a0971b2c1da4fbe4e5c7d8ed1ecb05.tar.gz |
Merge branch 'perf/urgent' into perf/core, to resolve conflict and to prepare for new patches
Conflicts:
arch/x86/kernel/traps.c
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-omap2/omap-headsmp.S')
-rw-r--r-- | arch/arm/mach-omap2/omap-headsmp.S | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 75e9295..40c5d5f 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -1,7 +1,7 @@ /* * Secondary CPU startup routine source file. * - * Copyright (C) 2009 Texas Instruments, Inc. + * Copyright (C) 2009-2014 Texas Instruments, Inc. * * Author: * Santosh Shilimkar <santosh.shilimkar@ti.com> @@ -28,9 +28,13 @@ * code. This routine also provides a holding flag into which * secondary core is held until we're ready for it to initialise. * The primary core will update this flag using a hardware -+ * register AuxCoreBoot0. + * register AuxCoreBoot0. */ ENTRY(omap5_secondary_startup) +.arm +THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. +THUMB( bx r9 ) @ If this is a Thumb-2 kernel, +THUMB( .thumb ) @ switch to Thumb now. wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 ldr r0, [r2] mov r0, r0, lsr #5 |