diff options
author | Tony Lindgren <tony@atomide.com> | 2012-11-30 08:40:31 -0800 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-11-30 08:40:31 -0800 |
commit | 2589d056122f6dcb405d411eae872aac8cf9da1b (patch) | |
tree | 8b2fb3a9f8205c110842c59ed42987a6f2b17e1a /arch/arm/mach-omap2/io.c | |
parent | 42a1cc9c0ec2a00b53b4f02849dc4377b09b3b05 (diff) | |
parent | 8b9c1ac2e11a9fb3a5a8860fb7570ff7633aa7f7 (diff) | |
download | op-kernel-dev-2589d056122f6dcb405d411eae872aac8cf9da1b.zip op-kernel-dev-2589d056122f6dcb405d411eae872aac8cf9da1b.tar.gz |
Merge tag 'tags/omap-for-v3.8/devel-prcm-signed' into omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3
omap prcm changes via Paul Walmsley <paul@pwsan.com>:
Some miscellaneous OMAP hwmod changes for 3.8, along with a PRM
change needed for one of the hwmod patches to function.
Basic test logs for this branch on top of Tony's
omap-for-v3.8/clock branch at commit
558a0780b0a04862a678f7823215424b4e5501f9 are here:
http://www.pwsan.com/omap/testlogs/hwmod_devel_a_3.8/20121121161522/
However, omap-for-v3.8/clock at 558a0780 does not include some fixes
that are needed for a successful test. With several reverts,
fixes, and workarounds applied, the following test logs were
obtained:
http://www.pwsan.com/omap/testlogs/TEST_hwmod_devel_a_3.8/20121121162719/
which indicate that the series tests cleanly.
Conflicts:
arch/arm/mach-omap2/cm33xx.c
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/prm_common.c
Diffstat (limited to 'arch/arm/mach-omap2/io.c')
-rw-r--r-- | arch/arm/mach-omap2/io.c | 101 |
1 files changed, 87 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 807b8d9..7c39238 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -40,8 +40,19 @@ #include "clock44xx.h" #include "omap-pm.h" #include "sdrc.h" +#include "control.h" #include "serial.h" #include "sram.h" +#include "cm2xxx.h" +#include "cm3xxx.h" +#include "prm.h" +#include "cm.h" +#include "prcm_mpu44xx.h" +#include "prminst44xx.h" +#include "cminst44xx.h" +#include "prm2xxx.h" +#include "prm3xxx.h" +#include "prm44xx.h" /* * The machine specific code may provide the extra mapping besides the @@ -264,7 +275,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = { #endif #ifdef CONFIG_SOC_OMAP2420 -void __init omap242x_map_common_io(void) +void __init omap242x_map_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); @@ -272,7 +283,7 @@ void __init omap242x_map_common_io(void) #endif #ifdef CONFIG_SOC_OMAP2430 -void __init omap243x_map_common_io(void) +void __init omap243x_map_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); @@ -280,28 +291,28 @@ void __init omap243x_map_common_io(void) #endif #ifdef CONFIG_ARCH_OMAP3 -void __init omap34xx_map_common_io(void) +void __init omap3_map_io(void) { iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); } #endif #ifdef CONFIG_SOC_TI81XX -void __init omapti81xx_map_common_io(void) +void __init ti81xx_map_io(void) { iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); } #endif #ifdef CONFIG_SOC_AM33XX -void __init omapam33xx_map_common_io(void) +void __init am33xx_map_io(void) { iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); } #endif #ifdef CONFIG_ARCH_OMAP4 -void __init omap44xx_map_common_io(void) +void __init omap4_map_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); omap_barriers_init(); @@ -309,7 +320,7 @@ void __init omap44xx_map_common_io(void) #endif #ifdef CONFIG_SOC_OMAP5 -void __init omap5_map_common_io(void) +void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); } @@ -371,8 +382,16 @@ static void __init omap_hwmod_init_postsetup(void) #ifdef CONFIG_SOC_OMAP2420 void __init omap2420_init_early(void) { - omap2_set_globals_242x(); + omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); omap2xxx_check_revision(); + omap2xxx_prm_init(); + omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); @@ -386,14 +405,23 @@ void __init omap2420_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap2_pm_init(); + omap2_clk_enable_autoidle_all(); } #endif #ifdef CONFIG_SOC_OMAP2430 void __init omap2430_init_early(void) { - omap2_set_globals_243x(); + omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); omap2xxx_check_revision(); + omap2xxx_prm_init(); + omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); @@ -407,6 +435,7 @@ void __init omap2430_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap2_pm_init(); + omap2_clk_enable_autoidle_all(); } #endif @@ -417,9 +446,17 @@ void __init omap2430_init_late(void) #ifdef CONFIG_ARCH_OMAP3 void __init omap3_init_early(void) { - omap2_set_globals_3xxx(); + omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); omap3xxx_check_revision(); omap3xxx_check_features(); + omap3xxx_prm_init(); + omap3xxx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); @@ -450,7 +487,12 @@ void __init am35xx_init_early(void) void __init ti81xx_init_early(void) { - omap2_set_globals_ti81xx(); + omap2_set_globals_tap(OMAP343X_CLASS, + OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); omap3xxx_voltagedomains_init(); @@ -466,6 +508,7 @@ void __init omap3_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } void __init omap3430_init_late(void) @@ -473,6 +516,7 @@ void __init omap3430_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } void __init omap35xx_init_late(void) @@ -480,6 +524,7 @@ void __init omap35xx_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } void __init omap3630_init_late(void) @@ -487,6 +532,7 @@ void __init omap3630_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } void __init am35xx_init_late(void) @@ -494,6 +540,7 @@ void __init am35xx_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } void __init ti81xx_init_late(void) @@ -501,13 +548,19 @@ void __init ti81xx_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap3_pm_init(); + omap2_clk_enable_autoidle_all(); } #endif #ifdef CONFIG_SOC_AM33XX void __init am33xx_init_early(void) { - omap2_set_globals_am33xx(); + omap2_set_globals_tap(AM335X_CLASS, + AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); + omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), + NULL); + omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); + omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_voltagedomains_init(); @@ -522,9 +575,19 @@ void __init am33xx_init_early(void) #ifdef CONFIG_ARCH_OMAP4 void __init omap4430_init_early(void) { - omap2_set_globals_443x(); + omap2_set_globals_tap(OMAP443X_CLASS, + OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); omap4xxx_check_revision(); omap4xxx_check_features(); + omap44xx_prm_init(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); @@ -538,13 +601,23 @@ void __init omap4430_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap4_pm_init(); + omap2_clk_enable_autoidle_all(); } #endif #ifdef CONFIG_SOC_OMAP5 void __init omap5_init_early(void) { - omap2_set_globals_5xxx(); + omap2_set_globals_tap(OMAP54XX_CLASS, + OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); omap5xxx_check_revision(); } #endif |