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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-01-09 02:59:09 +0530 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-12-08 11:29:01 -0800 |
| commit | 5e94c6e33e7c4726ef09f46c267e9ca232c5148a (patch) | |
| tree | ea13686167925b0a3f9e67ae02817cbb6986e0fc /arch/arm/mach-omap2/include | |
| parent | 0f3cf2ec81aeb4747624954bae2cc8decc48e12f (diff) | |
| download | op-kernel-dev-5e94c6e33e7c4726ef09f46c267e9ca232c5148a.zip op-kernel-dev-5e94c6e33e7c4726ef09f46c267e9ca232c5148a.tar.gz | |
ARM: OMAP4: PM: Add L2X0 cache lowpower support
When MPUSS hits off-mode, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/include')
| -rw-r--r-- | arch/arm/mach-omap2/include/mach/omap-secure.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/include/mach/omap-secure.h b/arch/arm/mach-omap2/include/mach/omap-secure.h index 5f0763d..c90a435 100644 --- a/arch/arm/mach-omap2/include/mach/omap-secure.h +++ b/arch/arm/mach-omap2/include/mach/omap-secure.h @@ -37,8 +37,13 @@ /* Secure Monitor mode APIs */ #define OMAP4_MON_SCU_PWR_INDEX 0x108 +#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100 +#define OMAP4_MON_L2X0_CTRL_INDEX 0x102 +#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109 +#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113 /* Secure PPA(Primary Protected Application) APIs */ +#define OMAP4_PPA_L2_POR_INDEX 0x23 #define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25 #ifndef __ASSEMBLER__ |
