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authorTony Lindgren <tony@atomide.com>2012-11-09 14:54:17 -0800
committerTony Lindgren <tony@atomide.com>2012-11-09 14:54:17 -0800
commitf56f52e02a9c3da4bc2cc6eb9ddcf5602ea44b37 (patch)
treea9ce4f46ea3b2e516698b2c3817e40414a8bbf51 /arch/arm/mach-omap2/i2c.c
parent84fbd2b8c8da49b4e53fcb484a1564a9b5da61b3 (diff)
parent6ba54ab4a49bbad736b0254aa6bdf0cb83013815 (diff)
downloadop-kernel-dev-f56f52e02a9c3da4bc2cc6eb9ddcf5602ea44b37.zip
op-kernel-dev-f56f52e02a9c3da4bc2cc6eb9ddcf5602ea44b37.tar.gz
Merge branch 'omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3' into omap-for-v3.8/dt
Conflicts: arch/arm/plat-omap/dmtimer.c Resolved as suggested by Jon Hunter.
Diffstat (limited to 'arch/arm/mach-omap2/i2c.c')
-rw-r--r--arch/arm/mach-omap2/i2c.c69
1 files changed, 66 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67..4e63097 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,11 +19,13 @@
*
*/
-#include <plat/i2c.h>
+#include "soc.h"
#include "common.h"
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
#include "mux.h"
+#include "i2c.h"
/* In register I2C_CON, Bit 15 is the I2C enable bit */
#define I2C_EN BIT(15)
@@ -33,7 +35,9 @@
/* Maximum microseconds to wait for OMAP module to softreset */
#define MAX_MODULE_SOFTRESET_WAIT 10000
-void __init omap2_i2c_mux_pins(int bus_id)
+#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
+
+static void __init omap2_i2c_mux_pins(int bus_id)
{
char mux_name[sizeof("i2c2_scl.i2c2_scl")];
@@ -104,3 +108,62 @@ int omap_i2c_reset(struct omap_hwmod *oh)
return 0;
}
+
+static int __init omap_i2c_nr_ports(void)
+{
+ int ports = 0;
+
+ if (cpu_is_omap24xx())
+ ports = 2;
+ else if (cpu_is_omap34xx())
+ ports = 3;
+ else if (cpu_is_omap44xx())
+ ports = 4;
+ return ports;
+}
+
+static const char name[] = "omap_i2c";
+
+int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
+ int bus_id)
+{
+ int l;
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+ char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
+ struct omap_i2c_bus_platform_data *pdata;
+ struct omap_i2c_dev_attr *dev_attr;
+
+ if (bus_id > omap_i2c_nr_ports())
+ return -EINVAL;
+
+ omap2_i2c_mux_pins(bus_id);
+
+ l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
+ WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
+ "String buffer overflow in I2C%d device setup\n", bus_id);
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err("Could not look up %s\n", oh_name);
+ return -EEXIST;
+ }
+
+ pdata = i2c_pdata;
+ /*
+ * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
+ * use, and functionality implementation flags, up to the OMAP I2C
+ * driver via platform data
+ */
+ pdata->rev = oh->class->rev;
+
+ dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
+ pdata->flags = dev_attr->flags;
+
+ pdev = omap_device_build(name, bus_id, oh, pdata,
+ sizeof(struct omap_i2c_bus_platform_data),
+ NULL, 0, 0);
+ WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
+
+ return PTR_RET(pdev);
+}
+
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